Philips LPC214 Series - PWM Match Registers; PWM Match Control Register (PWMMCR - 0 Xe001 4014)

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual Rev. 01 — 15 August 2005 261
Philips Semiconductors
UM10139
Volume 1 Chapter 16: PWM
16.4.6 PWM Match Registers (PWMMR0 - PWMMR6)
The 32-bit PWM Match register values are continuously compared to the PWM Timer
Counter value. When the two values are equal, actions can be triggered automatically.
The action possibilities are to generate an interrupt, reset the PWM Timer Counter, or stop
the timer. Actions are controlled by the settings in the PWMMCR register.
16.4.7 PWM Match Control Register (PWMMCR - 0xE001 4014)
The PWM Match Control Register is used to control what operations are performed when
one of the PWM Match Registers matches the PWM Timer Counter. The function of each
of the bits is shown in
Table 250.
Table 250: Match Control Register (MCR, TIMER0: T0MCR - address 0xE000 4014 and TIMER1: T1MCR - address
0xE000 8014) bit description
Bit Symbol Value Description Reset
value
0 PWMMR0I 1 Interrupt on PWMMR0: an interrupt is generated when PWMMR0 matches the value
in the PWMTC.
0
0 This interrupt is disabled.
1 PWMMR0R 1 Reset on PWMMR0: the PWMTC will be reset if PWMMR0 matches it. 0
0 This feature is disabled.
2 PWMMR0S 1 Stop on PWMMR0: the PWMTC and PWMPC will be stopped and PWMTCR[0] will
be set to 0 if PWMMR0 matches the PWMTC.
0
0 This feature is disabled
3 PWMMR1I 1 Interrupt on PWMMR1: an interrupt is generated when PWMMR1 matches the value
in the PWMTC.
0
0 This interrupt is disabled.
1 PWMMR1R 1 Reset on PWMMR1: the PWMTC will be reset if PWMMR1 matches it. 0
0 This feature is disabled.
5 PWMMR1S 1 Stop on PWMMR1: the PWMTC and PWMPC will be stopped and PWMTCR[0] will
be set to 0 if PWMMR1 matches the PWMTC.
0
0 This feature is disabled.
6 PWMMR2I 1 Interrupt on PWMMR2: an interrupt is generated when PWMMR2 matches the value
in the PWMTC.
0
0 This interrupt is disabled.
7 PWMMR2R 1 Reset on PWMMR2: the PWMTC will be reset if PWMMR2 matches it. 0
0 This feature is disabled.
8 PWMMR2S 1 Stop on PWMMR2: the PWMTC and PWMPC will be stopped and PWMTCR[0] will
be set to 0 if PWMMR2 matches the PWMTC.
0
0 This feature is disabled
9 PWMMR3I 1 Interrupt on PWMMR3: an interrupt is generated when PWMMR3 matches the value
in the PWMTC.
0
0 This interrupt is disabled.
10 PWMMR3R 1 Reset on PWMMR3: the PWMTC will be reset if PWMMR3 matches it. 0
0 This feature is disabled