Radio Shack 26-3801 - Page 45

w
(2)
MSM81C55RS
(PIO)
C-MOS,
2048-bit STATIC RAM with i/o
PORTS
and
TIMER
The
i/o
portion
consists of three general purpose i/o
ports.
One of the three ports can be programmed to be
status
pins, thus
allowing
the other
two
ports to
operate
in handshake
mode.
A
14-bit
programmable counter/timer
is also
included
on
the
chip to
provide
either a
square wave or
terminal
count
pulse for
the CPU
system, depending
on
the
timer
mode.
The
81C55
RAM
is not used in
Model 100. A
timer/counter
is
used as
the
clock generator
necessary for
communication and
to
generate
the melody.
K,
C
1
AO
3
v
ec
K,
C
2
39
1
K,
TIME
K
IN
C
]
M
J
*,
RESET C
4
31
3
"^
«H
C
s
*
3«7
TIMER
OUt C
•
3S
J
™.
IO/M C
34
3«,
CEORCE-C
U
3«.
16
C
•
11
3",
wr
C
10
lO
31
D
"i
ALE
C
"
ir\.
X
]",
no,
C
11
U
n
3
>*,
AO,
C
11 CO
n
J'»,
AO,
C
'«
"
D'S
AO,
C
11
M 3'*,
AO,
C
'•
18
D'S
AO,
C
"
14
3
'*>
AO,
C
«
13
3
'*»
AO,
C
11
11
3«i
*»
C
20
11
D",
CE
1S»X1
STATIC
RAM
TIMER
CLK
TIMS*
BUT
IT
„M«T1
K
1
-
v
cc
I.»VI
V„ I0VI
Fig
9
Pin
Configuration
and
Block
Diagram