Radio Shack 26-3801 - Page 46

¥2.
(a) 81C55
PIN FUNCTIONS
Symbol
RESET
(Input)
Function
Pulse provided
by the
80C85
to initialize
the
system
(connect
to
80C85 RESET
OUT).
Input
high on
this
line
resets
the
chip
and
initializes
the three I/O
ports to
input
mode.
The width
of
RESET
pulse should
typically be two
80C85
clock
cycle
times.
ADo_7
(Input)
3-state
Address/Data lines that interface
with
the
CPU lower
8-bit Address/Data Bus. The
8-bit address
is latched
into
the
address latch
inside the
81C55 on
the
falling edge
of
ALE.
The
address can
be either- for the memory
section or
the
I/O section
depending
on the IO/M input.
The 8-bit data
is
either
written
into
the chip
or read
from
the chip,
depending on
the WR
or RD input
signal.
CE
(Input)
Chip Enable:
CE
is
ACTIVE LOW.
RD
(Input)
Read
control:
Input low on this
line with the
Chip
Enable active
enables
and
ADo -7
buffers.
If
O/M
pin is low, the
RAM content
will
be read
out to the AD bus. Otherwise
the
content
of the
selected
I/O
port or
command/status
registers will
be
read
to the
AD
bus.
WR
(Input)
Write
control:
Input low
on
this line with the
Chip
Enable
active
causes the
data
on
the Address/Data bus to
be
written to
the
RAM
or
I/O ports and
command/status
register
depending
on
IO/M.
ALE
Address
Latch Enable: This control signal
latches
both
the
address
on the
AD _7
lines and the state
of
the
Chip
Enable
and
IO/M
into the chip at the falling edge of ALE.
IO/M
(Input)
Selects
memory
if
low and I/O
and
command/status
registers
if high.