8
Floppy
DIBk
Interface
The W01791 has
two
modes
0..!....E.E:!ratlon.
according
to
the
state
01
OoEN (pin 37). When DDEN =
1.
single density ls
selecte<:!.
When DDEN
:::
G.
double density is
selecte<!.
In
ei(her case. the
ClK
input (pin
24)
is
at
2
MHz.
When
the
clock
is al 2MHz, Ihe stepping rates of
3,
6,
10,
and
15
ms
are
obtainable if TEST"
:::
1.
Head POBltlonlng
Four commands cause positioning
01
the Read·WrÎte head
(reler
ta the
FOI
79X-C2 Data Sheet published
by
Western
Digital.)
The
period
01
each posilioning step
is
specilied
by
Ihe
r fjeld
in
bits 1 and 0 of
the
command ward.
After
the
tast directional step.
an
additional
15
miUiseconds
(ms) of head-selling
lime takes place if the Verily
flag
is sel
ln
Type
1commands. (Note: This time doubles ta 30
ms
for a 1
MHz
clock.)
If
TEST '"
0,
there is zero-selling
time.
There is
also a 15ms head-setling lime il the E Ilag is
set
in
any Type Il
or
III
commando
The rates (shown
ln
Table
5) can be applied to a Step-
Direcllon Motor lhrough the device inlerface.
Step - A
2~s
(MFM) or
4!J.s
(FM) pulse
1s
provided
as
an
output
ta
the drive. For every step pulse issued, the drive
moves one track location
in
a direction delermined by the
direclional output.
DirectIon (DIRe) - The Direction signal
is
active high when
stepping
in
and
low
wl"ten
stepping out. The Direction signal is
vaUd
121-1.s
belore lhe first stepping pulse ls generated.
When a Seek. Step or Restore command is executed.
an
optional verification
of
ReadlWrite
Mad
position can be
performed
by
setling bit 2 (V =
1)
in
the
command
ward
ta
a
laglc
,.
The verification operation bagins
atthe
end
01
the
151-1.s
sel1ing
lime after
the
head is loaded against lhe media. The track
numbar for the lirsl encountered
ID
Field is compared against
the contents
01
the Track Regisler.
Il the track
numbers
compare
and the ID Field CycliC
Redundancy Check (CAC) is
correct, the verily operation
is
complele and
an
INTRO is generated with
no
errors.
The
1791
must lind
an
ID
lield with a correct track number
and
a
correct CAC within
live revolulions of the media: otherwise,
the
seek error is
set
and
an
INTRO is generated.
The
foilowing example explains
the
use al the Stepping Raies
Table:
If
Clock is 2MHz
and
ï5DtN
(double density nol) is h
gh
(1)
and il bit
Al
is low (0) white bit
AD
is
high (1)
and
TEST
is
high
(1), then
the
stepping lime will
be
six mslstep.
CLK
2MHz:
2MHz 1MHz
lMHz
2MHz lMHz:
DDEN 0
1
0
1
X X
R1AO
TEST TEST
TEST
TEST TEST TEST
=1 =1 =1 =1
=0
=0
0 0 3 ms
3 ms
6 ms 6 ms
Approx.
Appro<.
0
1
6 ms 6 ms
12
ms
12
ms
200IL
S
400!J.~:
1
•
10
ms
10
ms
2G
ms
20
ms
1 1
15
ms
15
ms
30
ms
30 ms
Table
S.
Stepplng Rates
The
Head
load
(HlD)
oulput contrais lhe movement of .
he
ReadIWrite head against the media.
HlD
is activaled
at
he
beginning
of
a Type 1command if lhe h llag is
set
(h
'"
1),
at
the
end
of
the
Type 1command il the verity Ilag is sel
(V
=
1),
or upon receipt
of
any Type Il
or
III
commando
Once
HlD
is
active, it remalns
active until either a Type 1 command is
received wilh
(h
:::
0
and
V
'"
0); or
il
the
F01791 is
an
l,jle
state (non-busy) and
15
Index pulses have occurred, il is
res
~l.
Head
load
Timing
(HLn
is
an
input
to
the
Fo1791 which is
used tor the head engage lime.
When
HlT
=
1,
the
F01791
assumes the head is completely engaged.
The
head engage
lime is typically
30
la
65
ms,
depending
on
the
specification!;
01
Ihe drive used.
"CO
.,
__
---.J
l~
'0
>O'·'ir-------
Head L08d Timing
The
low la high transition
on
HlD
is used
ta
lire a
one
shot (1/2
01
U15). This one shot has a lime perlod
of
approximatfdy
50ms. The output of the one shot is then used lor
Hl
T a
ld
supplied
as
an Input
to
the
1791.
When bath
HlD
and
Hl
Tare
lrue,
the
1791
will then read
Ire
m
or
write
10
lhe media. The "and"
01
HlD
and
Hl
T
~ppears
a~
a
slalus bit
in
Type 1stalus.
ln
summary for
the
Type
1commands:
1/
h '" 0 and V
:::
0.
HlD
is sel
at
the beginning
01
the
command
and
Hl
T is
roI
sampled nor
is
there
an
internai 15ms delay. Il h '" 0 and V '"
1,
HlD
Is
set
near the
end
01
the
command,
an
internai
15ns
delay occurs,
and
Ihe
FD1791
waits lor
HU
la
ba
true.
"h
-
1
and
V -
1.
HlD
is set al the beginning al
the
commando
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