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Renesas RL78 Series Application Note

Renesas RL78 Series
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RL78 Family VDE Certified IEC60730/60335 Self Test Library
R01AN0749EG0201 Rev.2.01 Page 46 of 50
Mar 04, 2014
6.1.5 Interrupt SFR Protection
This is a write protection feature that prohibits a write to the Interrupt SFR registers. No error is generated if
a write occurs to this area, but the write operation does not change the state of the registers involved. The
protection can be turned off, if a change is required for the SFR registers or for safety reasons the SFR
settings are refreshed by the application.
The following interrupt registers can be protected with this function
IFxx, MKxx, PRxx, EGPx, and EGNx
The interrupt SFR registers can be guarded by the “GINT” bit as shown in figure 25 below
Figure 25 Interrupt SFR Guard Protection

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Renesas RL78 Series Specifications

General IconGeneral
CoreRL78
CPU Clock SpeedUp to 32 MHz
Flash MemoryUp to 512 KB
RAMUp to 32 KB
Operating Voltage1.6 V to 5.5 V
Low Power ModesHALT, STOP, SNOOZE
CPU Architecture16-bit
Temperature Range-40°C to +85°C
PackageLQFP
Timers16-bit timers
Communication InterfacesUART, I2C, LIN
A/D Converter12-bit

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