Sanyo DC-007C - IC Block Diagram

IC BLOCK DIAGRAM & DESCRIPTION
ICI 01 LA9240ML (Servo Signal Processor)
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NC
Fln2( 1)-
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w
TB( s)
I
1
IT
T9c
FSC
OQND
w
MC
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TE
w+
w.
Tm
mu
m
m
Hn,
1A
TES
To
Tom
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TQL
4P
JP+
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m
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F& FE FE. ma wsusm-sm Mmsln M- SL+JP
No. Pin Nama I lrO I
Function
231 SP
10 Ioutpuf Pin for Single End of Input Sinai of the
31 SL+ I
32 JP-
1 Input Pin for Tracking Jump Signal from DQital
33 JP+
I Signaf Processor.
34
TGL I Input Pin for Tracking Gain Control Sinai from
No. I Pin Name I VO I
Function
1 FIN2 I I lConnection Pin for Photo Diode of PickuD.
2 FIN1 I FIN2 + FIN1 = RF, FIN2 - FINI = FE ‘
3
E I Connection Pin for Photo Diode of Ptiup.
4 F I E- F=TE
24
WI
I
Input Pin for Spindle Amplifier.
’25
SPG
I
Connactiin Pin for Gain Setting Resistor, wtren
Spindle 12 cm Mock?.
26 sP-
1 Connection Pin for Constant of Spindle Phase
Compensation wfth SPD Pin.
27 SPD
o OutputPin for Spindle Control Signaf.
B
SLEQ
I Connection Pin for Constant of Sled Phase
Compensation.
,?9 SLD
o
Output Pin for Sled Control Siinal.
3) SL-
1 Input Pin for Sled Siinal from Micro Processor.
Digital Signal Processor. TGL = H: Gain Low
35
TOFF
I Input Pin for Tracking Off Control Signal from Digital
Signal Processor. TOFF = H: OFF
36 TES
o Output Pin for Track Error Sense Signal to Digital
Signal Processor.
37
HFL
I High Frequency Level Sinai Use Detection
Main-Beam Position is on the pit or mirror.
36 SLOF I Input Pin for Sled Servo Off Control.
33
cv-
1 Input Pin for Constant Linear Velocity Error
40
Cv+
I
Signal from Digital Signal Processor.
41 I
RFSM I O IOutput Pin for RF Signaf.
421
RFS-
1
I lConnectkrn Pin for Gain Setting of RF and
I I
lCons@f Setting of 3T Compensation of the
I
EFM Signal with RFSM Pin.
43 SLC
o SIb Level Control signal is Output Pin.
It Control Level of Data-Slice by Doital Sinai
Processor of the RF Waveform.
44 Su
I Input Pin for Level Control of Data-Slice by
I I
IDigital Signal Processor.
451
DGND
- lGround for Digtil Signal.
-1
461
FSC
I O Ioufput Pin for Focus Search Smooth Condenser
47 I TBC I O IConnection Pin for Variable Range Setting of
I
I
I
IEF Balance.
46]
NC
- No Connect
49
DEF
0
Output Pin for Defecf Detection of Disc.
93
CLK
I Input Pin for Reference Clock Pulse.
(4.23 MHz of Digital Signal Procassor)
51 CL
I Input Pin of Clock Pulse for Command from
Micro Pnxessor.
m DAT
I Input Pin of Data for Command from Micro
Procasaor.
53 CE
I Input Pin of Chip Enable for Command from Mi~o
Prccessor.
54
DRF
o
Output Pin for Detect of RF Level.
!5
FSS
I
select Pin for Focus Search Mode
!%
VCC2
-
VCC for Servo and Digital Root.
57
REFI
I Bus Control Connection Pin for Reference Voltage.
+
ml VR 10IQ@
ut Pin for Reference Voltage.
931 LF2
I lCOnnection Pin for Time Constant setting of
I
1
I
I
IDetect Detection of the Disc.
I
631
PHI
I
I lCapactor Connection Pin for Peak-hold of RF Sgnaf.
61 I
BH1
I lCawxitor Connection Pin for Bottom-hofd of
I
RF Signal.
e LDD
o Output Pin of APC (Automatic Power Control) Circuit.
63
LDs I Input Pin of APC (Automatic Power Control) Circuit.
64
Vccl
I VCC for RF Root.
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