Sanyo DC-C30 - Page 23

IC BLOCK DIAGRAM & DESCRIPTION
IC601 LC866548A ~Micro Processor)
Function
No.
Narna
Uo
Function
Input JogDial
!32’
Segl
o FL Segment ou@uf
Input JcgDial
53
0 FL .%gmentoutput
Serialclockoutput for TwVol_Func IC
54 0 FLSegmentouput
Serialdate outputforTu/Vol_Func/extendIC
!5 o FL Segmentou@ut
Serial clock output for extend ICI (DECK)
56
w
o FL SegmentoI@uf
Serialclockoutput for extend IC2(LED)
57 0 FL Segmentoutput
Serialclockoutput for
extend IC3(LED)
56
seg7
o FLsegment o@nrt
Seriallatchoutput
for Vol_Func IC
S3
o FL Segment oulput
Serial latch output for Tuner IC
m
o FL segment output
Serialdate output for Tuner IC
61
SegIo
o FL segmentoutput
Watchdog
timer input
G?
Segll
o
FLSegmentoutput
Resetterminal
63
sag12
o FL Segmentourput
Sub ckk connection terminal
64
sag13
o FL segment output
ISub clock connection terminal
f%
sag14
o FL Segmentou@ut
Ground
56 SEL_RVS_A
, Tape Mechanismselect
Main clock connection terminal (6MHz)
(Reverse=High, Normal =Low)
Main clock connection terminal (6MHz)
67 SEL_POW_RY I Power relay select (ON = high)
68
Power supply (+5V)
SEL_12_24
I Timer display (24h=High 12h=Low)
@
Key
input
MM_lN I Multimedia input input (ON = High)
Key input
70 V_CHK
1 Power suspension detection
Power suspension = Low
Key input
71 C2F
I C2Flag (DSP)
SW input SW2(EXTRA) SW3(HOME)
n VDD
Power supply (+5V)
SW input SW4(C_N0.) SW5(C_N0.)
73
G_REVS
, Failure record switch (Tape B side)
SW input SW7(Fwd) SW8(Revs)
SW input SW6(Open) Pick Limit switch
74
G_FWD
1 F~~~L~wmrd switch (Tape A side)
LEVEL input
75 B_PACK I Tape set detection(B side) switch (ON=LOW)
CD DSP interface (sub Q Request)
76 B_PALY I Play(B side) switch (ON=LOW)
Set protector (lrregulacLow)
77 A_PACK
I Tape set detaction(A side) switch (ON=LOW)
Remote control input
78 A_PWY I Play(A side) switch (ON=LOW)
FL Segment output
79 A_REEL
I Reel turn signal(A side)
FL Segment output
e) B_REEL I Reel turn signal(B side)
FL Segment output
81
POW_RY
o Power relay control output (ON= High)
FL Segment output
m P_CON o Power control signal (Power on=high)
FL digfi OIJtpUf
63 SP_RY
o speaker relay control outQut
FL digt
OlltfXlt
84
PRE_MUTE
o PRE MUTE output (Mute on = High)
FL digt
OUtpllt
%
MAIN_MUTE o Main mute output (Mute on=High)
FL digit
Ollt@lt
86
PULL_UP o pull-up power output (ON=LOW)
FL digit
Oll@Jf
87
DSP_RESET o
Reset signal to DSP (CD)
FLdigit
OU@Jt
m
CLK_SHIFT’
o Main clock shift
FL digit OU@lt
83
Vss
Ground
FL digif
OU@lt
93
VDD
Power supply (+5V)
FL digit
OIJ@ti
91 CARRIAGE+ o CARRIAGE-MOTOR control output+
FL digit
O@Wt
92
CARRIAGE- 0 CARRIAGE-MOTOR control output-
FL digi
O@XJt
93
DRAWER+ o DRAWER control output+
FL digit
OU@lt
94
DRAWER- 0 DRAWER control output-
Power supply (+5V)
%
COIN
o CD_DSP interface (command data output)
FL Segment output
98 SQUT
I CD_DSP interface (SubCl data input)
FL Segment output
97 CQCK
o CD_DSP intertace (clock)
FLSegmentoutput
98
VD_GND o GNDmntrol output for micon power check
FL Segmentoutput
S9 DRF
I DRF signal input
FL drive output power
Ial
Rwc o CD_DSP interface (command latch)
R&%--l%
#
4
D_OUT O
5
EXl_CLK O
6
EX2_CLK O
7
D3_cLK o
3=+
8
VF_CE O
9
TU_CE O
10
TU_Dl I
11
WD
E
12
RESET
13
X-rl
14 XT2
15
Vss
16 CF1
L
3=
17 CF2
18
VDD
19
KEYO
2?3
KEYI
21 KEY2
22 CD_SWO I
23 CD.SW1
I
24 CD_SW2
I
25 CD_SW3 I
1231 LEVEL
I
H=
27
WRQ
% PROTECTOR
23
IR
xl
seg15
I
T
-r
T
1311 .%916 10
.
H=
32
seg17
33
Se918
34
Digit12
35
Digitll 1
m
31
Digit7 o
431
Digit3 o
R
44 Digit2 o
45
Digitl o
46
VDD
47 SWJ19 o
48 %%20 o
1491 Se@ ]0
L
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