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IC BLOCK DAIGRAM & DESCRIPTION
IC500 M37903S4CHP (16-bit Micro Computer)
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
P81/CTS0/CLK0
P80/CTS0/RTS0/INT3
P87/TXD1
P86/RXD1
P85/CTS1/CLK1
P15/D5/LA5
P14/D4/LA4
P13/D3/LA3
P16/D6/LA6
P17/D7/LA7
P20/D8
P103/A3
P102/A2
P101/A1
P100/A0
P105/A5
P104/A4
P106/A6
P107/A7
P110/A8
P111/A9
P112/A10
P113/A11
P114/A12
P115/A13
P116/A14
P117/A15
P00/A16
P02/A18
P04/A20
P06/A22
P01/A17
P03/A19
P12/D2/LA2
P11/D1/LA1
P10/D0/LA0
P05/A21
P07/A23
VSS
MD1
P21/D9
P22/D10
P23/D11
P24/D12
P25/D13
P26/D14
P27/D15
P30/RDY
V
CC
XOUT
XIN
VSS
MD0
RESET
V
CC
VSS
NMI
AV
CC
AVSS
VREF
P83/TxD0
P82/RxD0
132465798101211 13 1514 16 1817 19 2120 22 2423 25
74 727375 71 6970 68 6667 65 6364 62 6061 59 5758 56 5455 53 51
52
P77/AN7/ADTRG/DA1/(INT2)
P57/TA3IN/RTP13/KI3
P53/TA1IN/RTP03
P52/TA1OUT/RTP02
P51/TA0IN/RTP01
P50/TA0OUT/RTP00
P64/INT2
P63/INT1
P62/INT0
P61/TA4IN
P60/TA4OUT
P56/TA3OUT/RTP12/KI2
P55/TA2IN/RTP11/KI4
P54/TA2OUT/RTP10/KI0
P76/AN6/DA0
BYTE
CDSEL
P75/AN5/(INT4)
P7
4/AN4/(INT3)
P7
3/AN3
P72/AN2
P71/AN1
P70/AN0
P87/TB2IN
P86/TB1IN
P85/TB0IN
P84/CTS1/RTS1/INT4
P47/CS3
P46/CS2
P45/CS1
P44/CS0
P43/HOLD
P4
2/HOLA
P40/ALE
P33/BHW
P32/BLW
P31/RD
P41/ø1
Processor Status Register PS (11)
Direct Page Register DPR0 (16)
Direct Page Register DPR1 (16)
Direct Page Register DPR2 (16)
Direct Page Register DPR3 (16)
Stack Pointer S (16)
Index Register Y (16)
Index Register X (16)
Accumulator B (16)
Accumulator A (16)
Program Counter PC (16)
Program Bank Register PG (8)
Input Buffer Register IB (16)
Data Bank Register DT (8)
Incrementer/Decrementer (24)
Arithmetic Logic
Unit (16)
Program Address Register PA (24)
Incrementer (24)
Timer TA0 (16)
RAM
2048 bytes
Timer TA4 (16)
Timer TA3 (16)
Timer TA2 (16)
Timer TA1 (16)
Timer TB0 (16)
Watchdog Timer
Timer TB2 (16)
Timer TB1 (16)
UART0 (9)
A-D
converter (10)
Low-order
data (8)
Low-order
address (8)
P4
(7) P3
(2)P5
(8)
D-A
1
converter (8)
D-A
0
converter (8)
UART1 (9)
Instruction Register (8)
Instruction Queue Buffer Q
9
(8)
Instruction Queue Buffer Q
8
(8)
Instruction Queue Buffer Q
7
(8)
Instruction Queue Buffer Q
6
(8)
Instruction Queue Buffer Q
5
(8)
Instruction Queue Buffer Q
4
(8)
Instruction Queue Buffer Q
3
(8)
Instruction Queue Buffer Q
2
(8)
Instruction Queue Buffer Q
1
(8)
Instruction Queue Buffer Q
0
(8)
Data Buffer DQ
3
(8)
Data Buffer DQ
2
(8)
Data Buffer DQ
1
(8)
Data Buffer DQ
0
(8)
Data Address Register DA (24)
High-order
address(8)/P0
(8)
High-order
Data (8)/P2
(8)
Middie-order
address(8)/P11
(8)
17
16
15
14
13
12
11
10
45
44
43
42
41
40
39
38
53
52
51
50
49
48
47
46
63
62
61
60
59
58
57
56
71
70
69
68
67
66
65
64
79
78
77
76
75
74
73
72
25
24
29
26
23
22
20
19
18
P6
(8)
9
8
7
6
5
4
3
2
P7
(8)
100
99
98
97
96
95
94
1
P8
(8)
Input/Output
port P8
Input/Output
port P7
Input/Output
port P6
Input/Output
port P5
Input/Output
port P4
Data bus/
Input/Output
port P2
(Note 1)
Data bus
Data Bus (Even)
Data Bus (Odd)
Address Bus
Address busAddress bus/Input/Output
port P0,P11 (Note 2)
Input/
Output
port P3
93
86
85
84
83
82
81
80
31
35
36
Note 1: When the external data bus width = 16 bits, this serves as the data bus; when the external data bus width = 8 bit, this serves as the I/O port.
2: According to the register setting, this can serve as the I/O port.
Clock Generating
Circuit
Clock input
X
IN
Clock output
X
OUT
32
Reset input
RESET
CDSEL
87
37
Vcc
91
55
34
(0V)
Vss
33
(5V)
MD
0
54
(0V)
MD
1
90
(0V)
AVss
88
AVcc
89
Reference
voltage input
V
BEF
92
NMI
30
External data bus
width select input
BYTE
28
Read output
RD
27
Write output
BLW
21
CS0
output
CS
0
Bus
Interface
Unit
(BIU)
Central Processing Unit (CPU)
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