SG Micro SGM4703 - Page 27

High-Power Stereo Class-D Audio Power Amplifier
SGM4703 with Adjustable Power Limit and Automatic Level Control
27
DECEMBER 2022
SG Micro Corp
www.sg-micro.com
APPLICATION INFORMATION (continued)
Audio Input Capacitors (C
INL1
, C
INL2
, C
INR1
and C
INR2
)
The input DC decoupling capacitors are recommended
to bias the incoming audio inputs to a proper DC level.
The input capacitor C
IN
, in conjunction with the amplifier
input resistance (including both internal resistor R
INI
and external resistor R
INE
, if any) forms a high-pass
filter that removes the DC bias of the audio inputs. The
corner frequency f
C,HPF
of the high-pass filter is given by
Equation 5. In the equation, it is assumed that R
INE
=
R
INL1
= R
INL2
= R
INR1
= R
INR2
and C
IN
= C
INL1
= C
INL2
=
C
INR1
= C
INR2
.
( )
=
× +×
C, HPF
INE INI IN
1
f
2π RRC
(5)
R
INE
is the external input resistance for a specific
voltage gain. Note that the variation of the actual input
resistance will affect the voltage gain proportionally.
Choose R
INE
with a tolerance of 2% or better.
Choose C
IN
such that f
C,HPF
is well below the lowest
frequency of interest. Setting it too high affects the
amplifiers’ low-frequency response. Consider an
example where the specification calls for A
V
= 26dB
and f
C,HPF
= 5Hz. In this example, R
INE
= 0Ω and R
INI
=
30kΩ and C
IN
is calculated to be about 1.06μF; thus
1μF, as a common choice of capacitance, can be
chosen for C
IN
.
Any mismatch in capacitance between two audio inputs
will cause a mismatch in the corner frequencies.
Severe mismatch may also cause turn-on pop noise,
PSRR, CMRR performance. Choose C
IN
with a
tolerance of ±2% or better.
Furthermore, the type of the input capacitor is crucial to
audio quality. For best audio quality, use capacitors
whose dielectrics have low-voltage coefficients, such
as tantalum or aluminum electrolytic. Capacitors with
high-voltage coefficients, such as ceramics, may result
in increased distortion at low frequencies.
Supply Coupling Capacitors (C
PVDD
, C
AV D D
,
C
GVDD
and C
PLIMIT
)
Decouple each pair of PVDD pins respectively with a
1μF low-ESR ceramic capacitor (X7R or X5R) to GND.
It is highly suggested to add an additional 0.01μF
ceramic capacitor, in tandem with each 1μF capacitor,
for high-frequency decoupling. The rated voltage of the
supply coupling capacitors must be higher than the
power supply voltage with sufficient tolerance to limit
the effects of DC bias. Place the decoupling capacitors
as individually close as possible to each pair of PVDD
pins.
If the power supply input is located more than a few
inches from SGM4703, additional bulk supply
decoupling capacitors (electrolytic or tantalum type)
may be required. Add a large (220μF or greater) bulk
capacitor on the PVDD power bus in close proximity to
the SGM4703.
Decouple the AVDD pin with a 1μF low-ESR ceramic
capacitor to AGND. Place the decoupling capacitor as
close as possible to the AVDD pin. Furthermore, add a
small decoupling resistor (R
AVDD
) of 10Ω between the
system power supply and the AVDD pin, preventing
high-frequency transients of PVDD from interfering with
on-chip linear amplifiers.
Decouple the GVDD pin with a 1μF low-ESR ceramic
capacitor to AGND. Place the decoupling capacitor
close to the GVDD pin.
Decouple the PLIMIT pin with a 0.1μF low-ESR
ceramic capacitor to AGND for high-frequency filtering.
Place the decoupling capacitor close to the PLIMIT pin.