Sharp CE-150 - Page 265

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li (a b): Co n te nts of the m emor y repr esen ted by 16 bits of ({/>( a cce ss ed by M EI): where"
rep rese nts high order 8 bits of th e add ress and b l ow or de r 8 bi ts
i: 8-bit i rrun:;d iatc d ata
i. j: 16-bit imm ed iate da ta of which high order 8 bits ar e represented by i and l ow
order 8 bi ts by i
C: Carry llag
IE: lnt cr rn pt e na b le n ag
Z: Zero ll ag
V: O vtr fi o,v fl ag
1 1: Half carry !lag
Data O o" ' di rcc Lion
A AN D
v OR
-.- Exclu si \'e OR
+ AD D
SU BTRA CT
2-4-2. Add, subtract, and logical instructions
(i) ADC (ADd with Carry)
Either th e contents of the intt;rnal r t.:g_ ist t.: r or e.xtcrna.I rnen1or y a rt: 8- hit added \ Vi t h the
accu
n1ula to r including carry. and it s result i ~ St (lrcd in the ac c \11n uhtttlr.
C. H. Z. and \I may chan ge.
•F o rm at
ADC' RI.
AD C RH
ADC (Rr eg )
1\ f)( " :t( R re g)
ADC' (ab)
A DC li (a b)
(EX) ADC XL
•Op er ation
A + (operand) + C - A
Va lue of the XL register is added to the accumulator. providing "C=O".
A= 0 0 0 0 0 0 0 E xe cu te A= I 0 0 1 I 0 I 0
1 I
-
XL =
0 0
I
0 0
c-o . H- 0 , z- o. v-o
I
c-o
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