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92
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ll
and more about Sharp PC-1500
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• 1
YO
-
iY3
is
selected
by
the
decoder
IC (TC40H139F)
when
the
gate
signa
l
input
BFO
(1
G)
is
low.
YO
..
...
• With
!ow
stale
of
i\D
14
and
1·
\D
15,
1h
c
YO
o
mpu
t goes low
so
as
io
s
clc<:1
the
( I
YO)
user
me
mor
y
ar
ea of the module unit. (Address a
ss
ig
n
me
nt
of
OOOOH
~
3FFFH)
YI
...
...
With high state
of
AD
14and l
ow
state
of
AD
15. the YI output goes low
so
as
(
IY
I) to sclccl the gate (G2A)
of
the IC (TC4
0Hl38
F). (Address assignment
of
4000H
-7FFF
H)
Y2
...
..
. With low state
of
AD
14
and
h
ig
h state
of
AD
1
5.
the
Y2
output goes l
ow
so as
( I
Y2)
to select the optional ROM
ar
ea
of
the module unit. (Address assignment
of
8000H-
BFF
FH)
Y3
...
. . . With high si
ate
of
A014
a nd
AD
15. the Y3 o
utpm
goes l
ow
so as
to
select
(
IY
3)
the system program
ROM
(SC61328F)
and
the 1/ 0 po
rt
(LH581 I or
LH58
10
). (Address assignment of COOOH-FF
FFH
)
•
SO
-
S7
is
selected
by
the
decod
er IC (TC40H138F)
when
the
gate
signal
i'
nput
MEO
(G1)
is
high,
Y1
(G2A) low, :and G2B
is
low
(normally
low).
SO
.
...
. .
Wi
th a
ll
of
ADI
I.
AD
12
and
AD
13
in low state, the SOt)ulput goes l
ow
so
as
(YO
) to select t
he
user RAM
(HM6
1
16).
(Address assignment
of
4()(lOH-47Fl-'H)
SI
......
With
hi
gh state of
AD
I I
amd
l
ow
state
of
AD
l2 and
ADl3
,
th
e
SI
outpul
(YT) goes low so as to se
lect
the
op
tional user RAM
ar
e
a.
(Address assignment
of
4800H- 4
FFFH)
S2
......
With low st
ate
of
AD
I I
and
ADU
and high state of
ADl2.
the S2 o
ut
put
(Y
2) goes low so as
tc>Sc
lect the ·
Op
tional user RAM ar
ea
. (/\ddrcss a
ss
ignment
of
50<XlH
-5
71+H)
SJ
......
With low state
of
AD I I
and
AD
l2
and h
ig
h stall:
of
A013.
tl
11:
SJ
out
put
(YJ)
go
es
low
so
as to select the us
er
RAM area. (Address assignment
of
580011
- SF
FFH)
S4
....
..
With high state
of
ADI
I a nd
AD
l3 a
nd
low state of
AD
l2. the S4 output
(
Y4
) goes low
so
as to select the user RAM area. (Address a
ss
ignm
en
t of
6000H-
67FFH)
SS
......
Do
nm use.
S6
.....
. With low state
of
/\D
I I
and
high state of
ADl2
and
ADl3.
the S6
out
put
(Y6) goes l
ow
so as to re
ce
ive
on
the 1/ 0 pon the data from the display chip RAM
or
in
terrupt inplll
fr
om the option. (Address a
ss
ignment
of7000H-77
FF
HJ
S7
....
. . W
it
h all of
AD
I I,
t\O
12, and
ADl3
in
high state. the S7 output
gm:s
l
ow
so
(Y7) as to
select the system RAM (
TC
55
14
)
(A
ddre
ss
a
ss
ignment
of
7800H-7f'FF
H)
• 2Y2, 2Y3
is
se
le
cted
by
the
decoder
IC (TC40H139)
when
the
2G
gate
becomes
effective
alter
the
selection
(low
state)
of
the
TC40H138F
output
S6
(Y6
).
V2
....
. . With low state of ADS a
nd
high state of DM E
O,
the 2Y2 output goes l
ow
and
(2
Y2
) makes the NANO gate
ou
tput
V2
high
so
as
to
sel
ect
di
sp
lay ch
ip
I and
3.(Addrcss
assignment of
7600H-76
FF
.H
)
VJ
......
With high st
ate
of
AD8
and
DMEO. the 2Y3 outpm goes low and makes the
(2Y3) NAND
gate outp
ut
V3
hi
gh
so
as
to select display chip 2 and 4. (Add
re
ss
assignment of
7700H
-77
FFH)
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