DV-600S
DV-600H
11-15. IC707 IX1473GE SERVO PROCCESSOR
Pin No. Terminal name I/O Operation function Remarks
1 VSS – Digital ground terminal.
2 BCK O Bit clock (1.4122MHz) output terminal.
3 AOUT O Audio data output terminal.
4 DOUT O Digital out output terminal.
5 MBOB O Buffer memory over signal output terminal. Over: “H”
6 IPF O Correction flag output terminal. When correction disable symbol
is given if AOUT output is C2 correction: “H”.
7 SBOK O Sub-code Q data CRCC judgment result output terminal.
Judgment result OK: “H”.
8 CLCK I/O Sub-code P to W data read clock output/input terminal.
Selectable with command bit.
9 VDD – Digital + power terminal
10 VSS – Digital ground terminal
11 DATA O Sub code P-W data output terminal.
12 SFSY O Playback system frame sync signal output terminal.
13 SBSY O Subcode block sync output terminal.
When subcode sync is detected, S1 position: “H”.
14 SPCK O Processor status signal read clock (176.4 kHz) output terminal.
15 SPDA O Processor status signal output terminal.
16 COFS O Correction system frame clock (7.35 kHz) output terminal.
17 MONIT O LSI internal signal monitor terminal.
DSP internal flag and PLL system clock can be monitored with
microcomputer command.
18 VDD – Digital + power terminal.
19 TESIO0 I Test input/output terminal. Usually fixed to “L”.
20 P2VREF – PLL system 2VREF terminal.
21 SPDO O VCO center frequency shift terminal.
22 PDOS O EFM and PLCK signal phase error signal output terminal.
(To be used when x8 speed operation is used)
23 PDO O EFM and PLCK signal phase error signal output terminal.
24 XMAXS O TMAX detection result output terminal.
To be selected with command bit TMPS.
25 TMAX O
26 LPFN I Reverse input terminal for low pass filter amplifier.
27 LPFO O Output terminal for low pass filter amplifier.
28 PVREF – PLL system VREF terminal.
29 VCOREF I VCO center frequency reference level terminal.
To be fixed usually to “PVREF”.
30 VCOF O Filter terminal for VCO.
31 AVSS – Analog system ground terminal.
32 SLCO O Data slice level generation DAC output terminal.
33 RFIN I RF signal input terminal.
34 AVDD – Analog system power terminal.
35 RFCT I RFRP signal center level input terminal.
36 RFZI I RFRP zero cross input terminal.
37 RFRP I RF ripple signal input terminal.
38 FEIN I Focus error signal input terminal.
39 SBAD I Sub-beam addition signal input terminal.
40 TSIN I Test input terminal. To be fixed usually to “Vref”
41 TEIN I Tracking error signal input terminal.
(Fetching when tracking servo is ON)
42 TEZI I Tracking error zero cross input terminal.
43 FOO O Focus equalizer output terminal.
TMAX detection result TMAXoutput
Longer than specific period “P2VREFF”
Shorter than specific period “VSS”
Within specified period “HiZ”
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