Sharp MZ-5500 Tehnical Manual

Fig.7-4 shows the block diagram of the MFD interface.
The MFD drive unit has three major actions of write, rend, and seek which
are dir~ct~y controlled by the~PD765 Floppy Disk Controller (FDC). As the
side of disk (frortt or reverse side), track, sector, and command (write,
read, seek) to the FDC are specified from the CPU by the software, the FDC
automatically ~ontrol the MFD drive unit.
The 8237 DMAC is used to transfer read/write data between the FDC and the
f
memory to perform fast DMA transfer.
8287 DUAC
765 FDC
Control t;:'j()(li
HLDA
DACK
11 ~ DACK WR
PrCc.o\Ylp
WR DATA
DATA
(.i((u,L
DRQ
DREQI
HRQ
WCLK~Wr j t~ decK
e iflUI t
AO
RD
l
RD DATA
A7
DATA~ YFO c.ir':uit
I DO-7 '~ ________ --J
SELO
Dri"~
SELI
s~\e(.t
prcm pSG -
SEL2
SELS
5 L3------')......J1
C~rL.t.Ait
--------'
'.
Fig.7~4 MFD interface block diagram
The
th e
following
disko
are requfred in order that the FDC r e ads fr om or writ es to
(1)
, I
(2)
(3)
(4)
The DMA request signal (DRQ) is issued from the FDC to the DMAC and
VFO/data separator (*1).
As the DMAC receives DRQ, HRQ (request) is sent from the DMAC to the
CPU.
As the CPU receives HRQ, the bus · line is opened, and HLDA is returned.
To which the DMACreturns DACK to the FDC.
Datfl are transferred between th e me mo r y a nd FDD via FDC und e r th e bit S
control by the DMAC.
The receive circuit from the MFD drive to the FDC ; is simplified by the u se
of the HA16632AP VFO/Data Separator. As it internally incorporates th e
window
clock by which the read data sjgnal is fetched from the floppy disk
drive which is then divided into the clock pulse and data pulse and the
timer circuit.
MFD drive · s~lect signals, SE ~ O - 2, are sent out from the FDC and only SET.3
is sent out through the 1/0 port which is incorporated in the AY-3-8912
Programmable Sound Generator (PSG).
s3
f
li

Sharp MZ-5500 Specifications

General

Brand	Sharp
Model	MZ-5500
Category	Desktop
Language	English