Sharp PC-1500 - Page 10

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(20) NM I
Non·maskable interrupt. A high NMI signal denotes an inte rrupt request, to which the MPU
responds unconditionally and the control mows to start the interrupt pro~ssing rout.inc after
the cont ents of th e memory address FFFC is moved into the high order byte of the program
counte r and the contents of the memory address FFFD into the low order byte of th e program
co unter .
(21) Ml
Maskable int
errupt. A hi gh on this signal makes interrupt request when interrupt enable is set.
The MP U responds uncond. it ionally to th is request. Cont ro l moves to start th e Interrupt
pr~ssing routine after the con tents of the memory address FFF8 is mo,·ed into the high order
byte of the program counter, the contents of the memory address FF F9 are moved i nto the lo w
order byte of the program counter .
(221 OD
011tp11t diS<lble. Wh en the OD ~ign al i$ act ive th e data bus is in the outpu t mode.
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