A
ll
and more about Sharp PC-1500
at
http://www.PC-1500.info
(9)
OPF
Operation code fetch appears when the
MPU
fetches
an
operation (instruction) code. OPF is
an
output only during the fetch
of
an instruction code and
is
not an
output
when address data,
immediate data,
or
the second byte
of
a two step instruction
is
fetched.
ADO-ADIS
MEO
OPF
Last Operation
Cycle fetch cyel.e
(10)
INO-
IN7
Input port. The
MP
U takes the signal
on
INO
- IN7 input port into the internal accumulator as
S·bit data.
(11)
PU, PV, DIS
On
chip Oipfiops
of
which outputs arc
on
1.SI
pins.
PU: Set
to
high with the SPU instruction and set to low with the RPU ins'lruction.
PV:
Set
to
high with the SPV instruction and set to low with the RPV instruction.
DIS: Set
to
high with the SOP instruction and set
to
low with the RDP instruction.
(12)
Pip
Strobe
output
is an
outpu
t during the execution
of
the ATP instruction normally, used
for
the
external latch
of
the A register contents.
l13l
.pos
Clock which is
in
the same
pha<e
as
the basic clock inside the chip and it
is
the basic clock for
an
entire system.
It
becomes the basic clock
of
I .3MHz frequency when a 2
.6MH
z crystal is connected between
Xl.Oand
XLI
.
(14)
WAIT
(15)
(16)
(17)
WAIT
output
that informs the
MP
U
that
addressed memory
or
1/0 device
is
not
ready. The
MP
U is
in
the
wait state while this signal
is
on
.
HO-H7
LCD
backplate signal
VA,
VB,
VM, VDIS
LCD
drive source.
HIN
LCD backplate signal. Counter input that g.enerates
HO
- H7. Normally connected
to
HA.
(18)
HA
MP
U divider output.
119)
BFO, BFI
MP
U
int
ernal register
BF
flipOop output (BFO) and input (BFI) can be reset
by
the instruction
from the
MPU and set by the
BFI
input. Normally used for the memory backup system.
7
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not sale this PDF
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