Sony CDP-C265 - Page 16

Pin Name i)
41
42
43
44
45
46
47
48
49
50
$1
52
53
DVpbp
ASYE
PSSL
WDCK
LRCK
DATA
BCLK
64DATA
64BCLK
64LRCK
GTOP
XUGF
XPLCK
GFS
PFCK
C2PO
XRAOF
MNT3
MNT2
MNTI1
MNTO
XTAI
XTAO
XTSL
DVss
FSTI
67 FSTO
C4M
C16M
MD
DOUT
EMPH
WFCK
74 SCOR
75 SBSO
76 EXCK
77 SQSO (SUBQ)
78 SQCK
79 MUTE
SENS
XRST
DIRC
Digital power supply
Asymmetry circuit ON/OFF (Connected to +5V)
Audio data output mode selection input (Connected to GND)
48-bit slot D/A interface. Word clock (Not used)
48-bit slot D/A interface. LR clock
DA 16 output when PSSL=1. 48-bit slot serial data when PSSL=0
DA 15 output when PSSL=1. 48-bit slot data when PSSL=0
DA 14 output when PSSL=1. 64-bit slot data when PSSL=0 (Not used)
DA 13 output when PSSL=1. 64-bit slot data when PSSL=0 (Not used)
DA 12 output when PSSL=1. 64-bit slot data when PSSL=0 (Not used)
A 11 output when PSSL=1. GTOP output when PSSL=0 (Not used)
DA 10 output when PSSL=1. XUGF output when PSSL=0 (Not used)
DA 09 output when PSSL=1. XPLCK output when PSSL=0
DA 08 output when PSSL=1. GFS output when PSSL=0
DA 07 output when PSSL=1. RFCK output when PSSL=0
DA 06 output when PSSL=1. C2PO output when PSSL=0 (Not used)
DA 05 output when PSSL=1. XRAOF output when PSSL=0 (Not used)
DA 04 output when PSSL=1. MNT3 output when PSSL=0
DA 03 output when PSSL=1. MNT2 output when PSSL=0
DA 02 output when PSSL=1. MNT1 output when PSSL=0
DA 01 output when PSSL=1. MNTO output when PSSL=0
tal oscillator circuit input
N >
55
56
57
58
59
61
62
63
64
65
x
’tal oscillator circuit output (Not used)
x
‘tal selection input pin (Connected to GND)
Uo
a.
s
Q
Zz 17]
x
2/3 divider output of pins 62, 63
2/3 divider output of pins 62, 63
4.2336 MHz output (Not used)
16.9344 MHz output (Not used)
Digital-out ON/OFF control pin
70
71
72
73
Digital-out output pin
Playback disc output in emphasis mode (Not used)
ub-code sync output
ub-P through Sub-W serial output (Not used)
lock input for SBSO read-out (Connected to GND)
ub-Q 80-bit output
lock input for SQSO read-out
OQ
QR
uting selection pin
=
81
82
83
84
85
Used in I-track jump mode
SENS serial data read-out clock
DFCT selection pin (Connected to GND)
Input pin for anti-shock (Connected to GND)
>| Ol” sa) 01 O
nA
ALSlA