Sony CFD-RG880CP - 7 Diagrams; Block Diagram -CD Section

CFD-RG880CP
CFD-RG880CP
2525
SECTION 7
DIAGRAMS
7-1. BLOCK DIAGRAM – CD Section –
A IN
RF OUT
A
C
B
D
E
F
A
C
B
D
E
F
5
2 1
C IN
6
B IN
7
D IN
8
E IN
RF SIGNAL PROCESSOR
EFMIN
RF OUT
13
F IN
14
LDLD
MD
VR
VC
TD+
TD–
SL+
SL–
FD+
+
FD–
–
PD
LDO
APC
18
LDS
19
VREF
VREF
D DO
D DI
D CL
D CE
D RESB
USB-TXD USB-RXD SLEEP
VC
VBUS
+5V
MUTE
VC
VC
11
LD POWER
CONTROLLER
Q701
TRACKING
COIL
DRIVE
SERVO
CONTROL
8FS
DIGITAL
FILTER
&
1-bit DAC
SYNCHRONIZATION
DETECTION
EFM DEMODULATION
OPTICAL PICK-UP
BLOCK
(KSM-213CDP)
SLED/SPINDLE
MOTOR DRIVER,
TRACKING/FOCUS
COIL DRIVER
IC703
SYSTEM SERVO PROCESSOR,
DIGITAL SIGNAL PROCESSOR
IC701
SYSTEM CONTROL
IC801 (1/4)
TRACKING
COIL
FOCUS
COIL
M702
(SLED)
24 25
23
19
20
FOCUS
COIL
DRIVE
SLED
MOTOR
DRIVE
5
6
10
9
SPINDLE
MOTOR
DRIVE
MM
SP+
I-CD LID
SP–
+
–
M701
(SPINDLE)
S701
(LIMIT)
MM
18
4
11
2
27
TDO
23
FDO
22
SLDO
24
SPDO
25
CONT3
32
D RESB
47
D CE
43
D CL
44
D DI
45
D DO
46
93 94 8 6 7
M-MUTE
O-CD RES
O-CD CE
O-CD CLK
O-CD DO
I-CD DI
92
USB-RXD
10091
USB-TXD
99
O-SW EN
98
I-SW FLG
40
87
SW2
PUSH
OPEN/
CLOSE
;
VBUS +5V
CONTROL
IC704
XOUT XIN
73 72
X701
16.9344MHz
CLOCK
GENERATOR
MCU I/F
LCHO
76
RCHO
78
STREQ
54
UHD+
D+
38
UHD–
D–
37
STCK
55
STDATA
56
PCMREQ
65
PCMLRSY
62
PCMBCK
63
PCMDATA
64
P70/INT0/TOLCP/AN8
46
P24/INT5/INT7/SCK4
33
P22/INT4/SO4/RD
31
P23/INT4/SI4/WR
32
P07/AN7/T70
28
P06/AN6/T60
27
P05/AN5/CK0/SDAT
CD L-CH
RCH
26
RES
2
P16/T1PWML/DE
15
P12/SCK
11
P71/INT1/TOHCP/AN9
47
P30/UTX1
45
P31/URX1
44
P10/SO
9
P11/SI
10
7
6
X702
12MHz
USB I/F
IC702
J1001
(USB)
CF2
CF1
A
MAIN
SECTION
: USB
: CD
• Signal Path
• R-CH is omitted due to same as L-CH.
(Page 27)