Sony CFD-S39 - Schematic Diagram - Main Section (1;3)

6-11. SCHEMATIC DIAGRAM — MAIN SECTION (3/3) —
CFD-S39
– 33 – – 34 –
Note:
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in Ω and
1
/
4
W or less unless otherwise
specified.
• C : panel designation.
• U : B+ Line.
• Power voltage is dc 9 V and fed with regulated dc power
supply from battery terminal.
(Page 29)
(Page 24)
(Page 32)
• Voltage and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
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• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms
6
7
IC501
#™
IC501
&£
5.2Vp-p
5.4Vp-p
4.19MHz
32.768kHz