Sony DXC-327 - Page 19

¢XD80950 (SONY) FLAT PACKAGE
MOS GATE ARRAY
= TOP VIEW —
'38523130292627 262526 23,
% ue
ers
ho sera
ho oer if
oop.
oon rook
ror
7 roe
* res
ate rou
thux
: Zhen
(ont 5)
(IN \i7o] SYMBOL, 170} sywaot |PIN|i/o| sympo. {F170} symBo.
ho. ro ko.
Th 66 [= =
2tr]—o1 ‘o-[— 00 faa [| exe Ps6 [| H0
ap [oe ‘O] bere [2s | Form [26 | 0" | inv
<1} 03 of yo1— peso roe —fsr] 1 | mw
S170] a2 ‘O[ bers far fo [tos [se] 1} oe
S70] At = [Go [28-0 [ros [39 [= veo.
Tol a0 2
370] a3 rsr2 [a0] 0 | tos far [ve
O10 [Aa T[-1sta_[ar 0 | tor a2 0] pay
fio | as TT cx fae} 0} tos ast 1 | ocx
io [ As [sao [sao | tos fee oT aver
swan tal ter PL Seatee’ [>| eaten [>| “este ARR a eee
t t t t
I
cand ron noone wee, [ee Zoers- oer
neu oureur
wool ner muse [erres, SKC | XH1_ACTIVE EDGE DECISION ‘A4—AB___; DATA ADDRESS.
renaton FORT CLK Sysrew cLoce DEFI Dera | DEFECT COMPENSATION GATE PULSE
? west CR 1 DEFECT COMPENSATION DATA SELECT (RG. BCH)
GeecoM MODE, LZNORMAL MODE)” wwvO iNvenTER
0-03; #bit PARALLEL DATA Pay 1207 DATA PARITY CHECK (H EVEN)
as cx BUR Sara NPUTS STROVE PULSE 00-109 | TEST TEAMNAL FOR INTERNAL OATA
Ec) Hi ExT ADDRESS, Ly INT ADDRESS ourpurs
Form | FAME REAO/#IELD READ xver ROM POWER VOLTAGE CONTROL TERMINAL
Svar (Hs HELD READ)
Ho HORZONTAL DRIVE inurourPuT
wn i nvenven ROAR: DATA. ADDRESS OUTPUTS
= {INPUT DATA SERIAL /PARALLEL {GATA'ADORESS INPUTS COM MODE)
SWITCH (1; SERIAL)
Tet = Tera ; TEST MODE SELECT
ve | Venricat oave
xn } CLOCK FOR DEFECT CORRECTION
aw NE COUNTER INPUT TERMINAL
BS DX¢-327 (J, UC)
DXC-327P (EK)