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Super Micro General X11SSM - Page 52

Super Micro General X11SSM
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52
X11SSM(-F)/X11SSL(-F) User Manual
Trusted Platform Module Header
Pin Denitions
Pin# Denition Pin# Denition
1 LCLK 2 GND
3 LFRAME# 4 <(KEY)>
5 LRESET# 6 +5V
7 LAD3 8 LAD2
9 +3.3V 10 LAD1
11 LAD0 12 GND
13 SMB_CLK 14 SMB_DAT
15 +3V Stdby 16 SERIRQ
17 GND 18 CLKRUN#
19 LPCPD# 20 LDRQ#
TPM/Port 80 Header
A Trusted Platform Module (TPM)/Port 80 header is located at JTPM1 to provide TPM support
and a Port 80 connection. Use this header to enhance system performance and data security.
Refer to the table below for pin denitions.
CPU
VGA
LAN2
LAN1
LE1
COM1
COM2
USB6/7
(3.0)
USB0/1
IPMI_LAN
JOH1
JUIDB1
BAR CODE
IPMI CODE
MAC CODE
FAN4
JPWR2
JPWR1
JPL1
DIMMB2
DIMMB1
DIMMA2
DIMMA1
LED BMC
JPI2C1
JPL2
CPU SLOT7 PCI-E 3.0 x8
FAN1
FAN2
FAN3
FANA
LED PWR
JSTBY1
JWD1
I-SGPIO1 I-SGPIO2
USB10(3.0)
USB8/9(3.0)
JSD1
JF1
I-SATA0
I-SATA1
JSD2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
USB4/5
JTPM1
JBT1
JL1
USB2/3
JD1
JPG1
JBR1
JPME2
JPB1
JI2C1
JI2C2
X11SSM(-F)/X11SSL(-F)
REV:1.01
Designed in the USA
BMC
MEGERAC
LICENSE
CPU SLOT6 PCI-E 3.0 x8(IN x16)
PCH SLOT5 PCI-E 3.0 x4(IN x8)
PCH SLOT4 PCI-E 3.0 x4(IN x8)
JIPMB1
SP1
Intel PCH
BT1
1. TPM Header
1

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