Supermicro H12SSL Series - Page 15

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Chapter 1: Introduction
Note:  

Figure 1-3. System Block Diagram
J9J3 J15J13J11J7
E
CPU
A
#0
DDR4 DIMM
#0
DDR4 DIMM
#0
DDR4 DIMM
#0
DDR4 DIMM
#0
DDR4 DIMM
#0
DDR4 DIMM
#0
DDR4 DIMM
#0
DDR4 DIMM
C
B
H
G
F
D
AMD SP3
G0G1G2G3
Slot 1
PCIe x16
G1 [0-15]
Slot 3
PCIe x16
G0 [0-15]
G2 [0-7]
G2 [8-11]
SATA 0-7
or
NVMe 0-1
G2 [12-15]
PCIe x4 M.2
PCIe x4 M.2
PCIe x8
Slot 2
G3 [8-15]
LSI 3008
Mini SAS HDMini SAS HD
NVMe 2-3
or
SATA 8-15
G3 [0-7]
P0P1P2P3
Slot 5
PCIe x16
P0 [0-15]
P1 [0-15]
Slot 7
PCIe x16
PCIe x8
Slot 4
PCIe x16
Slot 6
P2 [0-15]
P3 [0-7] REVERSAL
P3 [12-15]
BCM 57416
BCM 5720
LAN 1
LAN 2
P3 [9]
BMC
AST2500
IPMI LAN
RJ45
PHY
RTL821F
COM1
VGA
CPU USB2 (2)
TPM
UPC
MUX
BIOS ROM
32MB
UPC
SP1

BMC ROM
32MB
USB3.0 x2
Rear
ASM1042 #1
P3 [10]
P3 [8]
ASM1042 #2
USB3.0 x2
Front
CPU USB3 (0-1)
USB3.0 x2
Rear
REVERSAL
REVERSAL
REVERSAL
REVERSAL
REVERSAL
REVERSAL
REVERSAL
REVERSAL
J5 J1