Supermicro X12DAi-N6 - Page 69

69
Chapter 2: Installation
1. T-SGPIO 1
2. T-SGPIO 2
T-SGPIO 1/2/3 Headers
The T-SGPIO (Serial General Purpose Input/Output) headers are used for the onboard SATA
devices to communicate with the enclosure management chip on the backplane. See the
table below for more information.
T-SGPIO 1/2/3 Headers
Pin Denitions
T-SGPIO 1/2/3 Headers
Corresponding SATA Device Support
Pin# Denition Pin# Denition T-SGPIO# SATA Devices Supported
1 NC 2 NC T-SGPIO1 SATA1-6
3 Ground 4 DATA Out T-SGPIO2 
5 Load 6 Ground T-SGPIO2 S-SATA1/2
7 Clock  NC
NC = No Connection
BAR CODE
DESIGNED IN USA
MAC CODE
X12DAi-N
REV:1.01
BIOS LICENSE
JM2_2
MH18MH17
JM2_1
MH16MH15
HEARTBEAT
BMC
FANA
JBT1
T-SGPIO2
T-SGPIO1
BT1
JPWR3
J37
SATA4
SATA6 SATA5
SATA8 SATA7
SATA1 SATA3 SATA2
JPWR2JPWR1 JPWR4
JPRG1
JNVI2C
JPME1
JPL1
JWD1
JPL2
JD1
JVRM1JVRM2
JL1
JSPDIF_IN1
JSPDIF_OUT1
JTPM1
JA1
JRK1
LEDM1
LE4
LE7
JPI2C1
JVGA
FAN1
FAN2
FAN5
FAN6
FAN3FAN4
FAN7
JNCSI
JNVME1
JNVME2
JPCIE5
JPCIE4
JPCIE3
JPCIE2
JPCIE1
JF1
JUSBA
JSD1
JSD2
JUSB1
JP7
JUSB31_I1
JLAN1
JPCIE6
JAUDIO1
JIPMB1
RAID KEY-1
I-SATA5 I-SATA4
I-SATA3 I-SATA2
I-SATA1 I-SATA0
I-SATA6 I-SATA7
LAN/1/2
HD AUDIO
P2_NVME0/1
USB7(3.1)
LED
PWR
USB4(3.1)
P1_NVME0/1
USB5/6(3.0)
USB0/1/2/3(3.0)
VGA
COM1
CMOS CLEAR
TPM/PORT80JTPM1:
P1-DIMMB1 P1-DIMMA1 P1-DIMMD1 P1-DIMMC1
P1-DIMMG1 P1-DIMMF1 P1-DIMME1 P1-DIMMH1
P2-DIMMG1
P2-DIMMC1 P2-DIMMD1 P2-DIMMB1 P2-DIMMA1
P2-DIMME1 P2-DIMMF1 P2-DIMMH1
CPU2
CPU1
CPU1 SLOT1 PCI-E 4.0 X16
CPU2 SLOT2 PCI-E 4.0 X16
CPU1 SLOT3 PCI-E 4.0 X16
CPU2 SLOT4 PCI-E 4.0 X16
CPU1 SLOT5 PCI-E 4.0 X16
CPU2 SLOT6 PCI-E 4.0 X8
PCH
2 1