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Supermicro X12DAi-N6 - Page 97

Supermicro X12DAi-N6
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Chapter 4: BIOS
97
Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect (UPI)
connections. Select Topology Precedent to degrade UPI features if the system options

Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable for the system BIOS to enable Link L0p support which will allow the CPU
to reduce the UPI links from full width to half width in the event when the CPU's workload
is low in an attempt to save power. This feature is available for the system that uses Intel
processors with UPI technology support. The options are Disable, Enable, and Auto.
Note: You can change the performance settings for non-standard applications by us-
ing this parameter. It is recommended that the default settings be used for standard
applications.
Link L1 Enable
Select Enable for the BIOS to activate Link L1 support which will power down the UPI links
to save power when the system is idle. This feature is available for the system that uses
Intel processors with UPI technology support. The options are Disable, Enable, and Auto.
Note: Link L1 is an excellent feature for an idle system. L1 is used during Package
C-States when its latency is hidden by other components during a wakeup.

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