.
TANDY COMPUTER PRODUCTS •
BUS INTERFACE SPECIFICATIONS
This specification
is
for the primary bus
on
the Tandy 1000
HX main logic board, which also
is
available
to
the option
board connectors. The specification describes the signals
in the following manner. See Figures
2 and 3.
o The following signal nomenclature
is
used
in the
schematic
and
literature. Signals designated with
the
suffix "*" are logically "true low" (normal inactive
state
is
high);
if
they are not
so
designated,
the
signal
is
logically "true high."
o Direction
—
input
or
output
— is
referenced
to the
CPU.
o Brief functional description
of
the signal.
o Description
of the
"drive"
or
"load" characteristics
of
the signal. This includes the specific source
by IC
type
and
reference designator, drive capability
for
"output"
signals,
and
actual load for "input" signals.
The drive/load
is
defined
in
"unit loads"
and
specified
as "high/low." This specification
is
for the main
logic board only. Some signals have
an
alternate
source,
an
external bus master such
as
the DMA.
o
1
Unit Load (UL)
is
defined as:
Ioh
=
,04mA
@ 2.4V
Iol
=
1.6mA
@ 0.5V
13
Signal
A00
-
D0-D7
ALE
IOW*
IOR*
MEMW*
Listing
A19
0
I/O
0
0
0
0
ADDRESS
DATA
ADDRESS LATCH STROBE
I/O WRITE STROBE
I/O READ STROBE
MEMORY WRITE STROBE
SOURCE:
U23,U32,U36
Drive
-
65/15
UL
Latch Strobe
- ALE
Output Enable
- AEN
Alternate external
source
SOURCE:
U40
Drive
-
37/15
UL
Direction Control
-
RD*
(CPU read signal)
Enable
-
DEN*
SOURCE:
U6
Drive
-
50/7.5
UL
Output Enable
- AEN
Pull-Up
-
4.7K ohms
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