Technics SL-P200

M@ TERMINAL FUNCTION OF LSI
@ MN6617S (Digital Signal Processing: EFM Decoder, Error Correction, CLV Servo)
iTfe)
Division
Sub-code block (Q data) clock Resynchronizing signal
BLKCK
Es
(75H2)
ESY
|
0
|
(Not
used,
open)
CLDCK Sub-code frame (Q data) clock Synchronizing detection signal
(7.35 kHz) {Not used, open)
i
8
4]
Sub-code
(Q
data)
output
PBYTE
Interpolation
flag
for
each
byte
(Not used, open)
I a S| Sub-code (Q data) CRC check
(Not used, open) Interpolation prohibited
- Beek uP (Not used, connected to GND)
Reset signal input (reset at “L”)
LAGS C2 decoder correction flag 3
Command load input (Not used, open)
Command clock input aaa C2 decoder correction flag 2
(Not used, open)
LAG3 C2 decoder correction flag 1
(Not used, open)
33
5 — nn es]
r <
37
Muting control
(Not used, connected to GND)
ot] Command data input
; C1 decoder correction flag 2
TRON aaa spilt fate ae oe
TRON Lae | (tracking servo ON at “L”) (Not used, open)
C1 decoder correction flag 1
(Not used, open)
Crystal frame clock
41 LAG1
nn 1 un nn mul nn
rc fe) ~
Processing condition (CRC, OTC,
CLVOK, TT STOP) output
Clock output (4.2336 MHz)
PMCK Pitch control clock output we Wo 16K RAM data output
(Not used, open) DO
ITC Track counter input signal
(Not used, open)
ap
LE
[oe RAW OE sonar
Seay
AMWE 16K RAM WE signal
= Test mode selection
TEST zal (Not used, connected to +5V) oe Merny 16K RAM address signal
63 | RAMA1O (RAMAO: LSB, RAMA10: MSB)
Clock output (Not used, open)
Clock input
DA output parallel/serial selection
(serial at “L”)
(Not used, connected to GND)
(Not used, open)
Drop-out signal (Drop-out at “H”).
L channel deglitch signal/serial 67 CNT
data word clock. (Not used, open)
Clock signal output for spindle
motor control (Not used, open)
a|5| 3 sla
5
19 LDG/WDC
nN Oo
<
oS o
De-emphasis ON signal
(de-emphasis ON at “H”)
(Not used, open)
71
72 u/v oR me) AIA
°
Interpolation flag (interpolation at
“H”) (Not
used,
open)
73
<
oO
o
~“
>
Error flag (error at “H”)
(Not used, open)
16K RAM address reset signal
(reset at “H”) (Not used, open)
11T servo OK signal (OK at “H”)
(Not used, open)
signal. (Not used, open)
77
Nn ®
i.e) m
< z n”
Clock (16.9344 MHz) output
(Not used, open)
Serial data output (MSB first)
Serial data output (LSB first)
(Not used, open)
oe
zoe
aol
eo]
78
79 SSEL
RFO
Serial data word clock (Not used)
Serial data byte clock
(Not used, open)
GND terminal
R/L signal
(Not used, open)
Sub-code serial output data
(Not used, open)
Clock for sub-code serial output
(Not used, open)
oa!) ml DIizI!n
ETE: ae
oO } @ Oo
yn an?)
SL-P200
@ AN8370S (Optical Servo Control)
[1 [Power uprooted 5)
Press ateeneinew ay |
ee
[Pia tence eat
oT Prato tse poer contol ual
=o ackng reset outut
race rar aan esting out
Phase difference to voltage
conversion (+)
Phase difference to voltage
conversion (—)
Laser power inversion input
Capacitor connection for phase
difference memory
vo
Division
Control input
(TRON Tracking servo ON signal)
Wo
Control input (KICKF Kick direction
24 GNTS (Foward] command)
Control input (KICKR Kick direction
[Reverse] command)
le
z 4 rs
>| c|< a} oO} m
F.LOCK Focus lock signal output
4 m
ie) Cc
4
Capacitor connection for inversion
or” | @Fane RF high detection
Capacitor connection for inversion
RF low detection
E(+)
Capacitor connection for
non-inversion RF slow detection
Capacitor connection for
non-inversion RF fast detection
RF signal output
> PC(+)
REFE
Laser power non inversion input
Reference current generation
Drop-out detection output
=
+ m
G)
3
<
(2) 2 =m co |
z pL m|2| 7 = —
RF signal input
| SENSE | Selector output (track-crossed)
HIN | Tracking hold circuit input
HOUT Tracking hold circuit output
SPCNT Trackcrossing speed contro! output
(Not used, open)
Trackcrossing reference speed
8 | C.MSP
(Not used, open)
19 | CAF Auto focus timer capacitor
connection
KICK Track kick signal output
p21 fveo =f Power supply (connected to +5V)
Control input
| 22 | on ei (FOON Focus servo “ON” signal)
@ AN8371S (Data slice and PLL)
Wo
Division
SRF RF signal output data-sliced into
digital value
EFM EFM signa! output synchronized
with PCK
GND terminal (digital system)
Clock output extracted from SRF
Power supply (connected to +5V)
VCO free run frequency adjusting
7 VA
current input (not connected)
Capacitor connection for VCO
oscillator frequency
Resistor connection for VCO
oscillator frequency
Capacitor connection for PLL DO
protection
PLL loop filter connection
Focus search signal output
Capacitor connection for triangular
wave generation
5
7
Focus error signal output
ES m
oO at
4
37 Focus error gain adjusting input
n m
iF
1
1
1
setting capacitor connection
Focus error comparison voltage
generation
Photo detection currnt input (B)
vu
¥
ao
Current/voltage conversion (B)
< o
Current/voltage conversion (A)
Photo detection currmt input (A)
PLL loop filter connet ion
FPC a 4 Frequency comparisin error signal
input
RF signal input
RF signal output with AGC output
ARF signal input for {CaF drop-out
detection input
Loop filter for AGC ciranected
Drop-out detection pyse output
GND terminal (analoyssystem)
RF signal input for daz slicing
Slicing level control sggnal input
Filter capacitor for dyza slicer
connected
Filter capacitor for dyz slicer
connected