Technics SL-PG420A - Page 13

SL-PG420A_
MINTERNAL CONNECTION OF FL
*¢ Grid connection diagram
116
¢ Anode connection table
»
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a
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* Pin connection
PIN NO. (eas ella ae oa ab derstood alall
DIDIp ia } ]
eran eee and
2 GSB 17 16}514 131211 |PIGIGIGIG/GIGIGIGIGIGIGIPIP} 11
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NOTE: 1) Fi,F2 --- Fidament
2) NP w-~--+ No pin
3) 1G~11G -—- Grid
IND fu] ~J
st
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= aa
6
SCHEMATIC DIAGRAM
(Parts list on pages 30, 31, 36, 37.)
(This schematic diagram may be modified at any time with
development of new technology.) A
Notes:
© $601~612 : Numeric (>10, 0, 1~10) switches.
$801: 0, $602: 1, S603: 2,
$804: 3, S806: 4, S606: 5,
$607: > 10, S608: 10, S609: 9,
$610: 8, 8611: 7, S612:6
* $613 + Play (> PLAY) switch.
°S6i4: Skip (Iq SKIP) switch,
¢S615 =: Search (444) switch.
© S616 i! Program (PROGRAM) switch. B
© S617 > Dise link (DISC LINK) switch,
© $618 : Auto cue (AUTO CUE) switch.
© $619 : Stop (HI STOP) switch. |
$620 > Skip (D1 SKIP} switeh. |
$621 ; Search (PP) switch,
© $622 ; Recall (RECALL) switch.
© $623 . Tape-side select (SIDE AJB) switch.
© $624 : Random play (RANDOM) switch,
«$625 ;- Time fade (TIME FADE) switch.
¢ $626 : Disc tray open/close (A OPEN/CLOSE) switch.
«$627 —s::_:~ Pause (S| PAUSE) switch.
*$628 : Repeat (REPEAT) switch. C
* $629 : Clear (CLEAR) switch.
+ $630 ; Edit tape length (TAPE LENGTH) switch.
+ $631 : Time mode select (TIME MODE) switch.
« S632 : Peak jevel search (PEAK SEARCH) switch.
« $651 ; Power “STANDBY © {ON” (POWER) switch in “on”
position.
«$1001 : Tray (OPEN/CLOSE) switch.
* The voltage value and waveforms are the reference voltage of this
unit measured by DC electronic voltmeter (high Impedance) and
oscilloscope on the basis of chassis.
Accordingly, there may arise some error in voltage values and D
waveforms depending upon the internal impedance of the tester or
the measuring unit.
*The parenthesized are the values of voltage generated during
playing (Test disc 1kHz, L+R, 0dB), others are voltage values in
stop mode,
* |mportant safety notice:
Components identified by A mark have special characteristics
important for safety. When replacing any of these components,
use only manufacturer's specified parts,
©The supply part number Is described alone in the replacement
parts list.
| Part No. | Production Part No. Supply Part No.
LM2940TSM LM2940T5
1c802, 808 SVIBA4560FT1
| ——-=m= : Positive voltage lines and negative voltage
lines,
rece + Audio signal lines.
Caution!
IC and LSI are sensitive to static elactricity.
Secondary trouble can be prevented by taking care during repair.
¢ Cover the parts boxes made of plastics with aluminum fall
* Ground the soldering iron.
«Put a conductive mat on the work table,
« Do not touch the pins of IC or LS} with fingers directly.
B§ servo circuit
SL-PG420A ~° SL-PG420A
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RADIAL ERROR
SIGNAL PROCESSOR
SL-PG420A
¢ 1C301 (MN6626): Digital signal processor
0
mee —— termina!
oe Referance current input
— AF = input
{Not used, moet
RF signal polarity setting
RSEL terminal
(Not used, connected to VDD)
al
Test terminal
Flag terminat
Interpolation flag terminal
Crystal frame clock
(Not used, open)
Byie clock (Not used, open)
Word clock (Not used, open}
Reset terminat
Digital audio signal
(Not used, open)
ich deglitch signal
(Not used, open)
Reh deglitch signal
(Not used, open)
Serlal data output (MSB first)
>
vi Q > =
2) 3 |3|8|3 7 mm a
HO
BLKCK | 0 _ | Sub-codte block clock (f=75H2)
0 | (*H”: On)
aay Emphasis signal
Start (‘L's LOAD)
MCLK Ft | Gommand clock signal
D MUTE Muting input (“H”: MUTE)
SMCK System clock (f=4.2336MHz}
ie De-emphasis ON signal
Command load signal
MDATA Command data signat
STAT
Status signal
(CRC, CUE, CLVS, TTSTOP,
FCLV, SQOK)
+ =
S
Sub-code CRC check termina!
("H”: OK, bd Se NG)
Es Sub-code serial output data
48
FLAG
FCLK
Ems
- (Not used, open)
Sub-code serial output clock
(Not used, open)
= ie} za
Tracking servo ON signal
("L": ON)
Turntable servo phase synchro
signal
(‘H": CLV, “1”: Rough servo}
Nn +
CLYVS
Turntable motor ON signal
(“LY ON)
Turntable motor drive signal
{Forced mode}
Turntable motor drive signal
(Servo error signal}
3| a wn
w i= oo om x ©
oh
Serial bit clock output
YDD Power supply terminal
LROK LIF discriminating signal isl
57 TEST Test terminal (Normal: “H”)
Crystal OSC terminal ai (
(f=16.9344 MHz) SSEL “SUBQ” terminal mode select
(Not used, open) (“H": Q code buffer)
Frequency division clock signal MSEL “SMCK" terminal frequency
PMCK (Not a open) select (“L": SMCK=4,2336 MHz)
(f= = 75x CK= 88.2kHz) RESY Re-synchronizing signal of frame
sync. (Not used, open)
VSS
Test terminal
(Connected to GND}
Crystal OSC terminal
{f=16.9344 MH2)
Sub-code Q data
Sub-code Q register clock
Sub-code frame clock
(f=7.38kHz) (Not used, open)
Drop-out detection signal
(“H”: Drop-out)
(Not used, connected to GND)
bar]
he
EFM signal (Not used, open)
PLL extract clock (t=4,3218 MHz)
(Not used, open)
Phase comparated signal of
EFM and PCK (Not used, open)
=| ano