Theory of Operation—492/492P Service Vol. 1 (SN B030000 & up)
When the retrace one-shot times out (about 5.9 με), it
triggers the unblanking one-shot, U2042B, which sets R/O
UNBLANK high for about 5 ms. This refreshes the dot. The
corresponding low on the one-shot’s inverted output holds
FREQ DOT low until the dot marker is drawn. CR1041,
R1041, and C1041 slow the rise on the other input of
U1038A to prevent a spurious signal on FREQ DOT.
<Z>
FREQUENCY CONTROL SECTION
The Frequency Control section performs the tuning and
sweeping (scan) function for the Preselector, 1 st LO (Local
Oscillator), and 2nd LO. It contains the following major
circuits.
Sweep. The Sweep circuit accepts trigger inputs from
line, internal, and extenal sources in addition to the normal
free-run mode of operation. It also receives external hori
zontal and manual sweep inputs. The circuit produces a
PEN LIFT signal for chart recorder applications, a SWEEP
GATE signal for crt display blanking, a SWEEP signal to
drive the crt horizontal axis and digital storage circuit, plus a
ramp for the Span Attenuator circuits and eventually the
Preselector, 1 st LO and 2nd LO.
Span Attenuator. This circuit inverts and attenuates the
incoming ramp signal, as required to sweep the 1 st and 2 nd
Local Oscillators, and the Preselector.
Center Frequency Control. The Center Frequency Con
trol circuit provides a tuning voltage for the 1 st and 2 nd
Local Oscillator circuits that results in a linear center fre
quency change as the front panel FREQUENCY control is
changed. The circuit is directly controlled by the
microcomputer, so remote control of the frequency is possi
ble, by way of the GPIB rear-panel connector. The COARSE
TUNE VOLTS signal from this circuit is applied to the 1st LO
Driver circuits for summing with the SPAN signal to drive
the 1st LO. The FINE TUNE VOLTS signal is applied to the
Preselector Driver for summing with the IF Offset voltages,
and to the Shaper and Bias circuits for summing with the
2nd LO SWEEP signal.
1st LO Driver. The 1st LO Driver performs the following:
1) combines the COARSE TUNE VOLTS signal with the
SPAN signal and produces current to drive the 1st LO;
2 ) produces the tuning and sweeping signal for application
to the Preselector Driver circuits;
3) produces the mixer bias voltages;
4) produces the BUFFERED TUNE VOLTS signal that is
applied to the Display section;
5) produces a reference voltage that is used in both the 1 st
LO Driver circuit and the Preselector driver;
6 ) produces a supply voltage for the 1 st LO.
Preselector Driver. The Preselector Driver is included as
part of Option 01. The circuit combines the FINE TUNE
VOLTS signal, the PRESELECTOR DRIVE signal, and the
SPAN VOLTS signal. This combined signal is offset to com
pensate for the selected 1st IF then shared to drive the
Preselector so it tracks with the 1st or 2nd LO. Also, the
Preselector Driver drives a switch that selects either the
Preselector or the Lowpass Filter, depending on the
492/492P operating frequency.
Shaper and Bias Circuits. The Shaper and Bias circuits,
depicted on Diagram 38, are split between two systems.
The Bias circuits are considered to be part of the 2nd Con
verter System, so they are described with that system.
The Shaper circuit combines the 2nd LO SWEEP and
FINE TUNE VOLTS, then shapes the resultant to produce a
non-linear drive signal for the 2nd LO. Because of oscillator
characteristics, this non-linear voltage provides a linear fre
quency change with input voltage.
SWEEP <^>
An overall block diagram of these circuits appears adja
cent to Diagram 33. The Sweep circuit provides the ramp
signal to drive the Horizontal Deflection Amplifier, the 1st
Local Oscillator Driver, and the Preselector Driver (Option
01). The sweep generator also provides signals for an exter
nal plotter pen, the Z-axis, and digital storage circuits.
The Sweep circuit consists of four major circuits:
1 ) the digital control circuits, which receive and decode the
address and instructions from the microcomputer, select the
sweep rate, hoidoff time, trigger source, sweep mode, and
control interrupts to the microcomputer;
2 ) the trigger circuits, which process and multiplex the three
trigger signals;
3) the sweep generator, which generates the voltage ramp
that drives the Deflection Amplifiers, Digital Storage, and
the swept oscillators;
4) the sweep control circuit, which generates the SWEEP
GATE and PEN LIFT signals, and determines the hoidoff
time for the sweep generator.
REV AUG 1981
5-55
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