TEKTRONIX MANUAL CHANGE NOTICE
Date: 2-12-85
Product: 492/492P Service Vol 1. Manual Part No.: 070-3783-01
Change Ref: M55287 Product Group: 26
DESCRIPTION
EEF SN B055508
REPLACE the description of the Digital Control on Page 5-69,
Track/Hold Amplifiers on Page 5-70, and Write-Back Circuits on Page
5-70, all in the Theory of Operation Section, with the following:
Digital Control
The digital control circuits consist of buffer U4035, address decoder
U4045, steering register U4025, and the steering gates (U4015A, U4015B,
U4015D, U4060A, U4060B, and U4060D) . Because of the quantity of data
that must pass through these circuits, a steering register is used that
has a separate address. The first byte of data, which is the steering
byte, is clocked into U4025 by the ADDRESS 70 signal. The output
levels are applied to the steering gates, and the circuit waits for
the next byte. The microcomputer then furnishes the first byte of
data to be sent to low-order fine-tune digital-to-analog converter DAC,
for example, by way of storage register U3015. The byte is clocked
into the register by the coincidence of low states at the inputs of
U4015B; one from the steering byte, and the other from ADDRESS 71
signal, which is used to clock the steered data bytes into the correct
register. This continues until seven bytes of data have been clocked
into the correct register, including the steering byte. The third
output from U4045, ADDRESS 80, controls transistors Q1058 and Q2017,
which enable the write-back function.
In addition to the six steering lines that drive the steering gates,
U4025 also controls, by means fo the Q3 and Q7 lines, the hold/track
selector transistor for each converter side. Table 5-17 illustrates
the format for ADDRESS 70. Addresses are expressed as hexadecimal
numbers. Table 5-18 lists some of the significant states that are
used to tune the DAC.
Storage Registers. Six storage registers are used in the circuit,
U3015, U3025, U3035, U3050, U3060, and U3070. Since both sets are
identical, only the coarse tune section will be described.
Data from U4035, the data buffer, is clocked into the registers each
time a different tune voltage is required. U3050 feeds the lowest
eight bits to the low-order DAC, U2055; U3070 feeds the highest
eight bits of the high-order DAC, U2060. U3060 feeds the remaining
bits of both units.
Digital-To-Analog Converters. Since both the coarse and fine tune
circuits operate in the same manner, only the coarse tune section
of the board will be discussed here. Figure 5-28A is a functional
block diagram of the circuit.
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