Tektronix 492 - Page 9

492/492P Service Vol. I (SN B030000 & up)
LIST OF ILLUSTRATIONS (cont)
Fig.
Fig·
No.
Page No.
Page
5-7
Simplified block diagram of the phaselock 5-33
Flow chart of the 6800 main decision
circuits.......................................................
5-17 paths.......................................................
. 5-82
5-8
Bridged T attenuator equivalent schematic 5-21 5-34 6821 PIA registers and control lines..........
. 5-84
5-9
Three-stage log amplifier............................
5-30
5-35 A 6800 write to the instrument bus ..........
. 5-87
5-10
Log amplifier gain curve showing
5-36 Instrument bus poll sequence....................
5-88
breakpoint.................................................
5-30
ς-37 Scan by simplified keyboard encoder ........ 5-89
5-11
Ends of logging range ...............................
5-30
5-38
Keyboard encoder .....................................
5-90
5-12
Simplified detector circuit..........................
5-32
5-39 Switch matrix codes .................................
5-92
5-13
Selection of display position on log scale.. 5-33
5-40
Frequency control encoder timing ..............
5-93
5-14
Video filter simplified schematic ................
5-37
5-41 Primary regulator input and output
5-15 Vertical control IC block diagram ..............
5-40
waveforms (stylized) .................................
5-96
5-16
Horizontal control IC block diagram ..........
5-44
5-42 Timing waveforms (stylized) for soft-start
5-17
Simplified crt readout block diagram ........ 5-48 circuit ........................................................
5-97
5-18
Character on/off timing..............................
5-49 5-43
9914 GPIA block diagram ......................... 5-100
5-19
Character scan ......................................... 5-50
6-1
Hardware provided for slide track
5-20
Character generator (U1028) block diagram
5-51
mounting...................................................
6-3
5-21 Character scan timing ...............................
5-52
6 - 2
Instrument installed in a cabinet-type
5-22 Dot delay circuit timing..............................
5-53
6-4
5-23
Frequency dot marker circuit and timing ..
5-54
6-3
Complete slide-out track assemblies ........
6-5
5-24 Sweep "interrupt" circuits..........................
5-59
6-4
Method of mounting the stationary
5-25
Simplified digital-to-analog converter ........
5-60 sections.....................................................
6 -6
5-26
Simplified span decade attenuator ............
5-61 6-5
Measurements of front-rail mounting
5-27 DAC variance graph .................................
5-67
holes for the stationary sections................
6-7
5-28
Basic tune voltage converter ....................
5-68
6 -6
Procedure for inserting or removing
5-29
Timing diagram for F ERROR count .......... 5-73 the instrument...........................................
6 -8
5-30
Simple Logic diagram of processor clock..
5-79 6-7
Alignment adjustment for correct
5-31
Block diagram of 6800 microprocessor ...
5-80
operation...................................................
6-9
5-32 Read and write cycle timing on the
6 -8 Alternative method of installing the
microcomputer bus ...................................
5-81 instrument using rear support brackets ... 6 - 1 0