Tektronix 576 - Page 46

Fig . 3-4 . L ogic diagram, Pulse T imi ng chart for Step Generator
Clock circuit .
Circuit Descri p tion-Ty p e 576
3
Pu lse Timi ng C h art
L ow
Inhibits
Delaye d
Pu lse

Tr ut h Ta b le
O u t pu t Τ 701 pi n 11
O
u t
pu t Τ 701 pi n 13
Out pu t
U22ANo r mal
In pu t
to U22D pi n 13
Input to
U22C
pi n
9
I npu t
to U22C pi n 10
S N 7400
L
ogic Sym b ols
Χ
Β
O ut pu t U22AU3C & U3D Inh i b ited
Collecto r Su pp ly Out p ut +(
ΝΡΝ )
O u t pu t U22C Χ .5 Bu tton pu s h e d
O u tput U22C Χ 2B utto n pus hed
To
Co un te r
Out pu t U22C NO RM
Bu tton
p
us h e d
O u
t
pu
t
U22C Χ 2 &Χ .5 B utton pu she d
3- 5