Tektronix 576 - Page 52

am p lifier . T he output am p lifier h as two mo d es of o p era-
tion, o
n e p ro
d
ucing
current ste p
s
an
d t h e
ot
h er p ro d ucing
voltage ste p
s .
T he out put of t
h
e Ste p
Generator, w h ic h may be from
one to te n current ste p s of 350 μΑ p er ste p p lus from one
to ten ste p s of offset, is app lie d to t he base of Q105A (see
t h e Step Am p lifier sc h ematic) . Q105A and Β com p rise α
differe n tial am p lifier . As t he base current of Q105A is
decreased , t he collector current of 0105 Β increases, raising
t h e voltage at t h e base of Q110 . Eac
h
current
ste
p
at t he
base of 0105 Α , t h erefore, causes α p
ositive voltage ste
p
at
t h e base of Q1 " ΙΟ . T h
ese voltage ste p s
are am
p lifie d
an
d
inverte d by Q110, an d p art of t he output is
transmitte
d
t h ro ugh R 113, R
112
an d C112 creating negative fee
d bac k
at t h e base of Q105A . R113 ad j usts
t h
e feed
bac k gain
of
current to voltage am
p lifier
Q105
and Q110 for an out p ut
at t h e collector of
0110
of negative
goi n g ste
p
s with am p li-
tud es of 1/2 volt/ste p .
Q117 and 0122 have bee n ad ded to t he current to volt-
age am p lifier circuit to slow down t h e voltage transition
from t h e level of t he last ste p gen erate d to t h e zero ste p
level, in cases w h ere t h is tra n sitio n may cause d amage to
t h e d evice un d er test . Whe n t he p reset num b er of ste p s has
been p roduce d at t he Q110 out p ut, α ra p i d transitio n
occurs as t h e ste p returns to its starting point . T h is transi-
tion, w h
en a pp
lie
d to t h e base of α transistor, ra p
idly
turns
it off .
If
α transistor is t urne d off in t h is manner w hen its
collector is at α h ig h level, α h ig h in d uctive voltage kic k will
be prod uce d in t he collector supp ly transformer . Suc h an
in d uctive voltage kic k may be large enoug h to d amage t he
transistor .
T h is circuit o p erates eit h er w h en t he 2 ΧRAT E button is
presse d or w h en t he 300
μ
s and 80μ s
PUL
S E
D
ST
EP S
buttons are p resse d togeth er . In t h is case
t h
e
emitter circuit
of Q122 is op ene d , turning t he
transistor off . T he source of
FE T 0117 is h el d at
-11
.3
volts
by
d ivi d
er
R116-D115- R108 . Wh en Q122 turns off, divider
R119-R120-19121
sets t he voltage at t he gate of Q117 at
-10
.3 volts, turning
t h
e FE
T
on .
Wit h Q117
on,
its d rain is
h el d at about -11 .3 volts, p rovi d ing α constant voltage on
t h e side of C114 co
n
necte d to
Q117 .
By
h
ol d
ing
one
si d
e
of C114 at constant voltage and transmitting t
h
e out
p
ut of
Q110 across t h e oth er side, C114 becomes an integrator
.
T he voltage transition of t h e 0 110 out
p
ut
from t h
e
level
of
its last ste p to t he starting level is, t h erefore, slowe d d own
by integrator C114
.
Wh en Q122 is turne
d
on
(normal
or
0 .5
times
rate or DC
mo d e), Q117 is h eld off by having about
-34
volts
at its
gate
. Ι
η t
h is
case, t h
e
curren t t h roug h R 117
co
n trols t h e voltage on Q117 si de of C114, w h ic h moves up
a n d d own with c h anges in t he out p ut of 0110 . C114, t h ere-
fore, has little effect on t h e out p ut of Q110 an d cau ses no
slowing of t he voltage tra n sition .
Wh
en
relay Κ 101 Α is i n t he - p osition, t he out pu t of
Q110 is transmitte d t hr oug h inverter
circuit
Q1 30A
an d Β
and 0133 and i n verte d before it is ap p lied to t
h
e
out p ut
Ci r cuit
Descri p tio n -Type 576
am p lifier . T h e inverter is identical in op eration
to
t he cur-
rent
to voltage am
p
lifier described
p reviously
. Since
t
h
e
in p
ut resistance (
R 125) an d t he fee
d bac
k
resista nce ( R 137)
are e q ual, t
he gain
of
t h
e inverter
is 1 . I
NVER T Z ER O
ad j ustment R
127
sets t he voltage at t he base of Ο 130 Α so
t h at
t
h
e i n
itial level is t he same for t h
e non-inverted
ste
p
s
an d t h
e
inverte d ste p s .
T he p osition of relay
Κ 101
Α is controlled by t he CO L -
LE CTO R S UPPL Y P O L A RITY switch , t h e ST EP -O FF S E T
P O L A R ITY I NVER T button and t he Terminal Selector
switch in con j unction with t he step generator polarity logic
(see t
h
e Ste p
Am p lifier sc h
ematic) . U 33C and D, U 72A, Β
an d C form α coinci d ence gate . See Table 3-2 for α trut h
table of t h is gate . T he out put at p in 6 of U72B causes Q101
to tur n on an d off, t hus switch ing relay Κ 101 Α between
+
an d- . If α h ig h app ears at t he out put of U72B , Κ 101 Α
switc h es to t he - p ositio n an d if α low app ears, it remains
in t he
+
state .
T
he i
np
uts to U33C and D and to U 72A an d
C are controlle d by t he voltage levels on connectors Τ an d S
as s h own in Table 3-2 . Setting t he Terminal Selector switc h
to EM
ITT ER T
ERM
ST EP G EN
h
as t he same effect on t he
voltage level of connector Τ as p ressing
t
h
e P O L A RITY
I NVER T button . If t he P O L A RITY I NVER T
button
is
p ressed, h owever, t h e Terminal Selector switc h h as no
effect on t h e voltage level at connector Τ an d vice versa .
TA BLE
3-2
Step Gene r ator P olarity L ogic
Output Am p lifier . The ste p out p ut am
p
lifier transforms
t he out put ste p s of t h e current to voltage am
p
lifier
(or
i n verter) into current or voltage ste p s of various am p litu d es
as
d
etermine d by t he A MPL IT U D E switch . It is basically α
d ifferential am p lifier
wit
h se p arate
fee d bac k
to
eac h in p ut .
T he negative in p ut si d e of t he am
p
lifier
controls t he am p li-
tu d e of t he out p ut ste p s . T
h
e p ositive
in p ut si d
e
of t he
am p lifier provides eit h er current regulation or α constant
op erating level . To obtain current ste p s (see F ig . 3-7A), the
gai n of t he n egative si d e of t he d ifferential am p lifier is set
for an ou t put of 1 volt p er ste p . T h is out p ut is t he n t r an s-
mitted t hrou g h α variable resista
n ce
i
n series, Current Set-
ting Resistors . Wit h t he
constant voltage p er ste p relatio n -
s h ip across t he current setti
n
g resistors,
t h
e
current p er ste p
out p ut can be varie d by c h an ging t
h
is
resistance in series .
To obtain voltage ste p s, t h e i n put resistance to t h e
nega-
3- 1
1
CO LLE CTO R Connectors
S UPPL Y
P O L A RITY
P O L A RITY
I NVER T Τ S
P in 6
U 72 B
AC P ressed Η L Η
AC Not Pressed Η Η L
+(
ΝΡΝ ) Pr essed Η L Η
+( ΝΡΝ ) Not P resse d Η Η L
-( ΡΝΡ )
P resse d L L L
-( ΡΝΡ ) Ι
N
ot
P resse d Ι L ι Η Ι Η