Tektronix 576 - Page 51

Circ u it Description-Ty
p
e 576
and t he current
setti ng resistor p airs . It is t hese current
pat h s w
h ic h cause ste p current to be a pp lie d to t he ste p
amp lifier
input . Wh enever α h ig h a pp ears at one of t he mod-
ifie d counter
out p uts, its associate d steering d io d e turns off
and t he current
con d u cted by its associate d resistor p air is
a pp lied to t h
e
ste
p
am
p
lifier
input .
T he amount of curren t app lie d to
t h e ste p am p lifier in-
put is α fu n ctio
n
of t he mo d
ifie
d
counter out put and may
be d etermine d by add
ing
t
he currents co nducte dby each
resistor p air associate d wit
h
α mo
d ifie d counter out p u t
w h ic h is h ig h . F or exam p le, if five
counts h ave been re-
corded by t he counter, h ig h s a pp ear at t he cat
h
o d es
of D70
a nd D72 . T he current a pp lie d to t he ste p am p lifier
in p ut is,
t h erefore, one increment by R54- R 55 p lus four
increments
by R60- R 61, totalling 5 increments . T hus five cou
n ts re-
corded by t h e counter results in five increments of analog
cu rre n t a pp lie d to t h e ste p am p lifier in put . T he 1-2-4-4
mo d ifie d co unter code is d esig ned so t h at t h e ste p current
a p plie
d to t h e ste p am p lifier i np ut increases by one incre-
ment for eac h cloc k p ulse cou n te d by t he cou n ter (until t h e
co u nter resets) . Z ER O ST EP ad j ustment R97 controls t
h
e
level of t h e zero ste p (wit h zero offset) by a d j
usting t h e
q uiesce n t current t h roug h D82 and D83 .
Steering d io d es
D66, D67, D68 and D69 p rovi de current
p at h s for t he
c
u
rre n
ts
con du cte d by R55,R58, R61 an d
R64, res p
ectively, w h enever t he ST EP MUL T .1 Χ button
is
p ressed . (
W it h t he ST EP MUL T .1 Χ button p ressed D55,
D58,
D61 an d D64 are reverse biase d .) T
h
ese
new c u rrent
p at h s re d uce t he amount current p er increment
w h ic h may
be ap p
lie d to t he ste p am p lifier in p ut by α factor of 10 .
T h
e
res u lt is t h at t he normal ste p am
p
litu d
e
at
t
h
e Step
Genera-
tor out pu t is re d uce d to one-tenth its normal value .
T h e fourth set of steering dio d es,
D41,
D42,
D43
an
d
D44 is used only w hen t h e ste p generator is op erating
in t he
p ulse d mo de .
In all
oth er cases, t h eir cath o d es are h eld h ig h
an
d
t h ey h ave no effect on t he curre
n t app lie
d
to t he ste p
amplifier i npu t .
T he current summing no
d
e
s u ms current from R95 as
well as t he d igital-to-a n alog converter . T
h
e zero
ste p level
may be offset eit h er in t he d irection w h ic h ste p s are
ascen
d -
ing or in t he op posite directio n of asce
n t as d eter-
mi n ed by t he DC current con d ucte d by R95 . If offset
in
t he d irectio n of t he steps is desire d , t he AID O FF S
E T
button is p resse d . T h is allows p ositive voltage
to
be
a pp lie d
to
t h
e
base of Q90 u sing t he O FF S E T MUL T co n trol,
w h ic h raises t h e emitter voltage of Q93 and causes cur
r ent
to be co n ducted t hro u gh β95 . Wh en t he O PP OS E O FF SE
T
button
is p ressed, negative voltage is ap p lie d to t h e base of
Q90 using t he O FF S E T MUL T control, w h ic h causes cur-
rent to be con ducte
d t h roug h R95 in the opp osite d irec-
tion . O PP OS E O FF S E T a d j
ustment R85 and AID O FF SE T
ad j ustment R86 ad j usts
t
h
e offset level of t h e ste p s w h en
t he O PP OS E O FF S E T and AID O FF S ET buttons are
p resse d , res p ectively .
3-
1 0
P ulse d Step M o de . Wh en one of t he PUL S E D ST
EP S
buttons is p resse d , t he Ste p Generator out
p ut ste
p
s are
re duced to s hort pulses . T h ese pulsed steps are obtaine d by
in h ibiti n g t he d igital-to-analog converter for all b
u
t
300μ s
or 80μ s of eac h ste p .
T he d igital-to-a n alog converter is in
h
ibite d by p
ressing
eit her t he 300μ s or t he 80μ s PUL S E D ST EP S
button (see
t h e Step
Generator sc hematic) . P ressing one of t hese
buttons turns
Q41
on
an d p rovi d es current p at h s for t he
resistor p airs t h roug h
D41,
D42,
D43
an
d D44 . T he cligital-
to-analog
converter is in h ibited in t h is state because no ste p
current is
available to be app lie d to t he ste p am p lifier i np ut,
regardless of
t he con d ition of t he mo d ified counter o u t put .
T he
d
igital-to-analog converter remains i nh ibite d until α
negative-going trigger from t he collector of Q30 reverse
biases D39 an
d turns off Q41 . Wit h Q41 off, its collector
goes h ig h ,
turning
on
Q36 and reverse biasing steering
d
io d
es
D41, D42, D43 an d D44 . T he digital-to-a nalog con-
verter is now
enable d and free to p ro d uce α ste p i n t he
ma
n ner described p reviously . T h e duration of t he ste p is
controlled by t h e c harge time of C35 . Wit h 036 on, its
collector h ol d s one
si d
e of
C35 at about grou n d, allowing
t he oth er si de to be c
harge
d t
h roug h R 39 (and R37 w hen
t he 300μ s
button is p ressed) . C35 ch arges until D39 is
forwar d biased
an d Q41 again turns on . Wit h Q41 on, Q36
is turne d off an
d t h
e
digital-to-analog converter is again
i nh ibite d by t h e
steering d
io
d
es
D41,D42, D43 and D44 .
Since each p ulsed ste p is triggered by α negative-going
trigger from t
h
e delay circuit,
t h
e p ulsed ste p
s always
a pp ear at t h e p ea
k
of
t he Collector
Su
pp ly out p ut . Wh en
t he ste p generator is op erating in t he p ulse d ste p mo d e, t
h
e
2Χ RAT E butto
n
is
i
nh ibited .
Wh en 041 is turne d on, Q46 is turned off, w h ic h also
t u rns off 052 . The
emitter of Q52 is connecte d to t he gri d
of t h e C RT,
V 897 (see t he C R T Circuit sc h ematic) . Wh en
Q52 turns off,
its emitter voltage goes negative, causing t he
intensity of t h e CRT d is p lay to be re d uce
d . T h e d is p lay
intensity remai n s reduce d un til
041
tur
n s off, allowing Q46
an d Q52 to turn on . TheCRT dis p lay
in t he p ulse d ste p
mo de is, t
h erefore, intensified only w h en α p u lse d ste p
occurs .
T he Collector Su
pp ly sc h ematic s h ows t h at w h en eit h er
t he 300μ s or t he 80
μ
s
PUL
S
E D
ST
EP S button is p ressed,
Κ 320 is
energized and t h e Collector Su pp ly op erates in its
DC mo de . It
may also be seen, t h at if t he 300μ s an d 80 μ s
PUL S E D ST EP S
buttons are p resse d togeth er, 300 μ s
p ulsed ste p
s are generate d and t h e collector supply o p erates
in its normal mo d e (
Κ320 is not energized ) .
Step Am p lifier
The ste p am p lifier transforms t h e out put of t
h
e step
generator into current or voltage ste p s of various
am p li-
tu d es to be a pp lie d to t he d evice und er test . T he A
MPL I-
TU D E switch , w h ic h is p art of t h is circuit, d etermines t he
am p litu de of t he ste p s . T
h
e circuit
consists of α current to
voltage
converter, an inverter and α d ifferential out p ut