Tektronix 576 - Page 50

T h e state of p in 2 of
cloc k p ulse enable U 69A d eter-
mines w h et h er clock p ulses
are
ap
p lie d to t he p in 14 in p ut
of U 70 . Wh e n t he STEP F A M I L Y
REP button is p resse d , α
low is a pp lie d to p
in 5 of U69B , causing p in 2 of U
69A to
be h el d p ermanently h ig h . In
t h is state of U 69A, all cloc k
p ulses a pp lie d to its p
in 1 in put are inverte d , and become
counter triggers . Wh en t h e ST
EP F A M I L Y SI NGLE button
is p resse
d , α momentary low is app lie d to p
in 5 of U 69 B
w h ic h goes h ig h as C78 c h arges . T h is
momentary low en-
ables U 69A until o ne ste p family h as been
generate d . Wh en
t he reset h ig h causes p in 4 of U 69
B to go h ig h , α low is
p roduce d at t he p in 2 in put of
U 69A . T h is low i nh ibits
cloc k pulses from
being transmitte d p ast U 69A .
Digital-to-Analog
Co n verter . T he out p uts of t h
e
mo d
i-
fie d counter are
connecte
d to
t he digital-to-analog conver-
ter . T he p ur p ose of
t h is circuit is to convert t he mo d ified
counter out put co d e into an alog
current w h ic h is app lie d to
t he ste p am p lifier in put .
T he d igital-to-analog converter
consists of α set of curre n t setting
resistor p airs and four
sets of current steering d iodes .
Fi g . 3-6 . Sim plif ied sc h emat i c o f Digital-To-Analog Converter .
Circ uit Desc
r
i
p
tion-Ty
p
e 576
T h
e
d igital-to-analog converter con d ucts α constant
amount of current, t
h
e
amount of w h ic h is set by current
setting resistor p airs R 54-1955, 1957-1958, R 60- R 61 and
R 63-1964 (see
F ig . 3-6) . E ac h resistor p air con ducts α d is-
crete amount of current w h ic h is α multi p le of t h e mo d ifie d
co u nter co d e : one increment of current con ducted by
R 54-1955, two increments by R 57- R 58, four by R 60- R 61
an d four by R
63-1964 . E ac h successive increment of current
causes one ste p to be generate d
at t he Ste p Ge nerator out-
p ut .
T he steering d io
d
es
d etermine w h ere in t he circuit cur-
rent from
t
h
ese resistor p airs is con ducted . Dio des D70,
D71, D72 and D73 p rovi de cu rre n t p at h s between t he mod-
ifie d counter out p uts and t h e resistor p airs . C u rrent is con-
ducte
d by
one of t hese d io d es w h enever its associate d mo d -
ifie d counter output is low .
Anoth er set of current p at h s is p rovi ded by d io d es D54,
D57, D60 an d D63 . T h ese d io d es p rovi d e current p at h s
between t he current summing no de (at t he cat h o de of D83)
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