Terasic DE10-Standard User Manual

DE10-Standard
User Manual
1
www.terasic.com
January 19, 2017

Terasic DE10-Standard Specifications

General

FPGA	Yes
HPS Memory	1 GB DDR3
Ethernet	10/100/1000 Mbps
USB	USB 2.0
HDMI	Yes
Push-buttons	4
Video Output	HDMI, VGA
Storage	microSD card slot
UART	Yes
JTAG	Yes
ARM Processor	Cortex-A9
Audio	Line-in, Line-out, Microphone
Switches	4
Expansion	GPIO
Power Supply	5V
Operating Temperature	0°C to 85°C

Summary

Introduction to the DE10-Standard Board

Block Diagram of the DE10-Standard Board

Presents the system's block diagram, illustrating connections between major components.

Using the DE10-Standard Board

Settings of FPGA Configuration Mode

Explains how to configure the FPGA's operating mode using DIP switches.

Configuration of Cyclone V SoC FPGA on DE10-Standard

Details the JTAG and Active Serial programming methods for the FPGA.

User Push-buttons, Switches and LEDs

Details the connections and functionality of user buttons, switches, and LEDs.

VGA Output

Details the VGA output connector and its signal generation.

TV Decoder

Describes the ADV7180 TV decoder for analog video input.

SDRAM Memory

Details the 64MB SDRAM chip connected to the FPGA.

Peripherals Connected to Hard Processor System (HPS)

Introduces interfaces connected directly to the HPS processor.

Gigabit Ethernet

Describes the Gigabit Ethernet PHY and MAC interface.

UART to USB

Explains the UART to USB interface using an FT232R chip.

DDR3 Memory

Details the 1GB DDR3 SDRAM connected to the HPS.

Micro SD Card Socket

Describes the Micro SD card interface for storage and booting.

2-port USB Host

DE10-Standard System Builder

Design Flow

Using DE10-Standard System Builder

Examples For FPGA

DE10-Standard Factory Configuration

Audio Recording and Playing

Karaoke Machine

SDRAM Test in Nios II

SDRAM Test in Verilog

TV Box Demonstration

Explains how to turn the board into a TV box using VGA output and TV decoder.

PS/2 Mouse Demonstration

IR Emitter LED and Receiver Demonstration

ADC Reading

Examples for HPS SoC

Hello Program

Users LED and KEY

Examples for using both HPS SoC and FGPA

System Requirements

AXI bridges in Intel SoC FPGA

Programming the EPCS Device

Before Programming Begins

Specifies the required FPGA mode setting for using quad Flash as configuration device.

Convert .SOF File to .JIC File

Guides on converting .SOF files to .JIC files using Quartus II.