Timer_A Operation
11-7
Timer_A
Continuous Mode
In the continuous mode, the timer repeatedly counts up to 0FFFFh and restarts
from zero as shown in Figure 11−4. The capture/compare register TACCR0
works the same way as the other capture/compare registers.
Figure 11−4. Continuous Mode
0h
0FFFFh
The TAIFG interrupt flag is set when the timer counts from 0FFFFh to zero.
Figure 11−5 shows the flag set cycle.
Figure 11−5. Continuous Mode Flag Setting
FFFEh FFFFh 0h
Timer Clock
Timer
Set TAIFG
1h FFFEh FFFFh 0h
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