Texas Instruments MSP430x1xx - Page 312

USART Registers: SPI Mode
14-21
USART Peripheral Interface, SPI Mode
UTXIE0
‡
Bit 1 USART0 transmit interrupt enable. This bit enables the UTXIFG0 interrupt.
0 Interrupt not enabled
1 Interrupt enabled
URXIE0
‡
Bit 0 USART0 receive interrupt enable. This bit enables the URXIFG0 interrupt for
USART0.
0 Interrupt not enabled
1 Interrupt enabled
‡
MSP430x12xx devices only