Texas Instruments MSP430x1xx - Page 317

I
2
C Module Introduction
15-3
USART Peripheral Interface, I
2
C Mode
Figure 15−1. USART Block Diagram: I
2
C Mode
Receive Shift Register
Transmit Shift Register
SDA
I2C Clock Generator
I2CEN
SCL
MST
ACLK
SMCLK
SMCLK
0
1
00
01
10
11
0
1
LISTEN
I2CSSELx
1
No clock
I2CIN
I2CCLK
I2CDRW
I2CSCLLOW
I2CTXUDF
I2CRXOVR
I2CSBD
I2CWORD
I2COA
I2CSA
I2CPSC
I2CSCLL
I2CSCLH
I2CNDATx
I2CRM
XA
SYNC = 1
I2C = 1
I2CTRX
R/W
I2CSTB
I2CSTP
I2CSTT
I2CBUSY