I
2
C Module Operation
15-7
USART Peripheral Interface, I
2
C Mode
15.2.3 I
2
C Addressing Modes
The I
2
C module supports 7-bit and 10-bit addressing modes.
7-Bit Addressing
In the 7-bit addressing format, shown in Figure 15−5, the first byte is the 7-bit
slave address and the R/W
bit. The ACK bit is sent from the receiver after each
byte.
Figure 15−5. I
2
C Module 7-Bit Addressing Format
S Slave Address R/W ACK Data ACK Data ACK P
7 8 8
111 1 11
10-Bit Addressing
In the 10-bit addressing format, shown in Figure 15−6, the first byte is made
up of 11110b plus the two MSBs of the 10-bit slave address and the R/W bit.
The ACK bit is sent from the receiver after each byte. The next byte is the
remaining 8 bits of the 10-bit slave address, followed by the ACK bit and the
8-bit data.
Figure 15−6. I
2
C Module 10-Bit Addressing Format
S
1
Slave Address 1st byte
7
Slave Address 2nd byteACKR/W
11
8
ACK
1
Data
8
ACK
1
P
1
11110XX
Repeated START Conditions
The direction of data flow on SDA can be changed by the master, without first
stopping a transfer, by issuing a repeated START condition. This is called a
RESTART. After a RESTART is issued, the slave address is again sent out with
the new data direction specified by the R/W
bit. The RESTART condition is
shown in Figure 15−7.
Figure 15−7. I
2
C Module Addressing Format with Repeated START Condition
1
7 8 7 8
11 11 11 11
S Slave Address
R/W ACK
Data
ACK
S Slave Address
R/W ACK
Data
ACK
P
1 Any
Number
1 Any Number
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