Toshiba MD20H63 - Page 5

DIGITAL MODULE BLOCK DIAGRAM
DTV ASIC
IC2401
ZR39740HGCF-B0
X2401
25MHz
U9
U10
A8
C12 C11
U13
ADR
DAT
13
16
+2.6V
+2.6V
PB OUT
Y OUT
RESETN
I2C_DATA
MSG_REQ
+3.3V
ASIC+1.8V
AUDIO DAC
IC2406
CS4345-CZZ
T3
R3
R2
R1
SDIN
BCLK LRCK
ACLK
910 7
+5V
1
234
F-7
F-8
CVBS_IN/740_INIT
28
SD_H/SEL_SW27
IF_N
25
IF_P
24
IF_AGC
22
AFT121
SPDIF
20
+9V
19
AUDIO-R
18
AUDIO-L
17
SIF/2ND_CVBS
16
Pb OUT
15
Y OUT
14
Pr OUT
13
DTV_RESET
12
I2C_CLK
11
I2C_DATA
10
TX
9
RX
8
7
AFT0/MSG_REQ
6
ASIC+1.8V
5
+5V2 +2.6V
1
TV BLOCK CP2403
EEPROM
IC2403
AT24C04N-10SU-2.7
B11
B12
SDA
SCL
8
56
+3.3V
+3.3V
NC
I2C_CLK
SIF AMP
SIF
SIF
F3
SPDIF
U1
IF_AGC
A5
IF_P
B1
IF_N
C1
SD_H/SEL_SW
U5
CVBS_IN/740_INIT
F1
256Mbit DDR SDSAM
IC2402
HY5DU561622ETP-D43
SD_CS
SD_WR
SD_CLK
SD_RD
SD_DET
+3.3V
UART0TX
UART0RX
CP2420
9
8
7
6
5
4
3
2
T5
A4
C4
SPI FLASH
IC2405
EN25P16-50HCP
56
2
B4
U6
+3.3V
8
A11
A12
C5
A3
C6
1
3
7
NC NC
NC
NC