Toshiba MM20E45 - Page 18

2-8
4-2-1 Generation of Start/stop Status
Fig. 2-3
4-3 I
2
C Bus Data Format
(1) Memory IC
* Write mode
S
Slave address
8 bits
RW AC
Word address
8 bits
Data 8 bits
AC ST
AC
* Read mode
S
Slave address
8 bits
RW
AC
Word address
8 bits
Data 8 bits
AC ST
AC
Slave address
8 bits
AC
(2) DPC IC
S
Slave address
8 bits
RW AC
Data 8 bits
AC ST
AC
Sub-address
8 bits
A0H (WRITE)
8CH
SCL terminal
S
DA termianl
Start
condition
Data transmission
Acknowledge
signal
Stop
condition
SCL terminal
SDA termianl
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D7 D6 D5 D4 D3 D2 D1 D0