7-2
1. SECTIONAL EXPLANATION OF IC
(1) Pin 1 is input terminal of hor sync signal.
Coupling capacitor of 0.01 µF is used to feed hor sync signal
of approx. 2V. For input sync signal, both polarities of
positive and negative can be allowed, and trigger is done on
the front edge.
The pulse width of sync signal which can be input into this
terminal, is 3/20Th (Th: one cycle of hor) or less for both
polarities of positive and negative.
(3) Pin 3 is control terminal of H. SHIFT.
Range of control voltage is 0 to 2.5V. When control voltage
is 2.5V, phase of FBP become most delayed condition to hor
sync signal.
The hor phase shift controlled by this terminal is decided by
time constant connected to pin 4, and is independent of hor
osc frequency of pin 11.
80K
180
C1
H.SYNC
0.01
1
Fig. 2
(2) Pin 2 is ENABLE terminal of hor sync signal.
When this terminal is open, voltage of this terminal turns
LOW condition by inside bias of IC.
At the time, hor osc circuit is locked on hor sync signal which
is input from pin 1.
To turn hor osc circuit to running condition, the voltage of
this terminal is raised to 3V or more.
2
2.5V
30K
100
H: ENABLE IN
(4) Pin 4 is time constant circuit to decide hor phase shift
controlled by voltage of pin 3.
Fig. 3
3
1K
Fig. 4
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