ViewSonic VG181 - Page 30

Service Manual ViewSonic
VG181 July 2000 - Version 1.0
THEORY OF CIRCUIT OPERATION
DVI_D Interface
VG181 uses the TMDS interface to support the digital port input. The Sil161
receiver uses PanelLink Digital Technology for inputs ranging from VGA to SXGA
@75Hz.
The Sil161 receiver supports true color 24 bit/pixel/16.7M color in 1 or 2
pixels/clock mode. It also features an inter-pair skew tolerance up to 1 full input
clock cycle. In addition, the receiver data output is time staggered to reduce
ground bounce which affects EMI. Ail PanelLink products are designed on
scaleable CMOS architecture to support future performance requirements while
maintaining the same logical interface.
PanelLink Digital technology simplifies PC and display interface design by
resolving many system level issues associated with high-speed digital design.
Function Block Diagram
PIXS
DFO
OCK_INY
Termination
EXT_RES Contso}
RX2+ DATA,
Data Recovery A
pxo- Osa a Lens! 8S ania.)
re
aude
Channel oe oe
al
aca
SYNC1
SYNC
SYNCI
Decoder
ee
HSYNC
ogic VSYNCG
| pata, | SCDOT
cTL1
ata Recovery
24
x = +
CTL2
CTL3
Oa,
RXC+
PLL
M
RXC-
PDC
STAG_OUT
ST
Page 28
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