Xilinx EH600 A Series - Page 34

31
F3.07 Change rate of
terminals UP / DW
0.01 100.0Hz/s～ 0.01Hz/S 1.00Hz/S
F3.08
AI1Minimum input
0.00V 10.00V～
0.00V 10.00V
when current inputs 1V corresponding 2mA
～
：
0.00V 10.00V
when current inputs 1V corresponding 2mA
～
：
0.01V
0.01V
0.01V
0.00V
0.00V
○
○
F3.09
I
A 1Minimum input
corresponding setup
-100.0 100.0%～
0.1%
0.0%
○
F3.11
AI1Maximum input
corresponding setup
-100.0 100.0%～
-100.0 100.0%～
-100.0 100.0%～
0.1%
100.0％
○
F3.13 AI
2 Minimum input
corresponding setup
-1
00.0 100.0%～ 0.1%
0.0%
F3.14 A
I2 Maximum input
F3.15 A
I2 Maximum input
corresponding setup
-100.0 100.0%～
0.1%
0.1%
0.1%
100.0％
100.0％
F3.16
F3.18
PULSE input (DI)
lower limit frequency
PULSE input (DI)
upper limit frequency
0.000kHz [F3.18]～
[F3.16] 5～ 0.00kHz
0.001
0.001
kHz
kHz
0.0kHz
10.00kHz
F3.17
F3.19
PULSE input (DI)
lower limit frequency
corresponding setup
PULSE input (DI)
upper limitfrequency
corresponding setup
0.0%
F3.20
Anolog input filter
time
0.01 10.00s～ 0.01 s
0.25 s
○
○
○
○
○
○
○
○
F4.00
Relay output selection
F4.01 OC1 output selection
F4.02
OC
2 output selection
F4.03
0 no output：
1 Inverter is running：
2 Fault output：
3 Frequency level detection FDT1 output：
4 Frequency level detection FDT2 output：
5 Frequency arrival：
6 at the zero speed operation：
7 Inverter overload pre-warning：
8 Setup counting value arrival：
9 Designated counting value arrival：
10 Setup length arrival：
11 PLC circulation completion：
12 PLC phase completion：
13 Setup running time arrival：
14 Output frequency arrive at upper limit：
15 Output frequency arrive at lower limit：
16: Output X1
17: Output X2
1
2
1
1
1
5
1
0
○
○
○
○
0.01V
10.00V
10.00V
F3.10
I
A 1 Maximum input
○
0.00V 10.00V～
F3.12
I
A 2 Minimum input
○
Group F
4
Output Terminal
Reserved function
Chapter 5 Function Parameter Table
Factory default
value
Modif-
ication
Function
code
Name
Setup range
Minimum unit