Xilinx System Generator V2.1 - Page 115

State Machine 115
Xilinx Blocks
stream of bits. The state transition diagram and equivalent transition table are shown
below.
Figure 3-77: Mealy State Machine example transition diagram and table
The table lists the next state and output that result from the current state and input.
For instance, if the current state is 3 and the input is 1, the next state is 1 and the
output is 1, indicating the detection of the desired sequence. The next state and
output matrices are constructed in the following way:
Figure 3-78: Construction of Next State and Output matrices