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Xilinx System Generator V2.1 - Registered Moore State Machine

Xilinx System Generator V2.1
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State Machine 123
Xilinx Blocks
Registered Moore State Machine
The Xilinx Registered Moore State Machine block implements
a state machine whose output depends only on the current
state. This block is like the Moore State Machine block, except
that its output logic is registered.
A block diagram of this type of state machine is shown below:
Figure 3-88: Registered Moore State Machine block diagram
The block is configured by providing a next state matrix and an output array. They
are defined by the state machine’s next state/output table. For example, consider the
problem of designing a state machine to recognize the pattern ’1011’ within a serial

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