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Xilinx System Generator V2.1 - Page 120

Xilinx System Generator V2.1
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120 Xilinx Development System
Xilinx System Generator v2.1 Reference Guide
stream of bits. The state transition diagram and equivalent transition table are shown
below.
Figure 3-85: Registered Mealy State Machine example transition diagram and
table
The table lists the next state and output that result from the current state and input.
For instance, if the current state is 3 and the input is 1, the next state is 1 and the
output is 1, indicating the detection of the desired sequence.

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