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Xilinx System Generator V2.1 - Page 46

Xilinx System Generator V2.1
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46 Xilinx Development System
Xilinx System Generator v2.1 Reference Guide
only the first three fractional bits. The following diagram illustrates how to extract all
but the top 16 and bottom 8 bits of the input.
Figure 3-21: Slice block operation
Block Parameters Dialog Box
The block parameters dialog box can be invoked by double-clicking the icon in your
Simulink model.

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