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Yamaha disklavier MX-100A - Page 45

Yamaha disklavier MX-100A
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2. CONSTITUENT PARTS
The internal circuit in PMAC consists roughly of six parts:
DRAM controller···Controls address switching, and timing, and memory refreshing
DMA controller···Controls DMA transfers between FDC and DRAM
Timer control···Controls interrupts generated by the internal timer and external triggers
Address decoder···Decodes the addresses from the CPU and generates the address decode signals
for and
FDC support circuit···Generates clock signals for FDC and carries out write data precompensation
for the disks
Timing controller···Uses microprograms to sequence the PMAC
PMAC operations are sequentially guided by the 8MHz clock.
YM5205 Pin Assignment
42