Yamaha TRS-MS02 - LSI Pin Descriptions (Continued); AK5381 VT-E2 (ADC) LSI Pins; DM9000 AEP (LAN CONTROLLER) LSI Pins; M34519 M6-521 FP (CPLD) LSI Pins

41
Tyros3
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
P1
3
D0
D1
D2
D3
D4
D5
D6/CNTR0
D
7/CNTR1
P50
P51
P52
P53
P20/SCK
P21/SOUT
P22/SIN
RESET
CNV
SS
XOUT
XIN
VSS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
O
I
–
Port P1 serves as a 4-bit I/O port
Each pin of port D has an independent 1-bit
wide I/O function
Each pin of port D has an independent 1-bit wide I/O function / CNTR0
Each pin of port D has an independent 1-bit wide I/O function / CNTR1
Port P5 serves as a 4-bit I/O port
Port P2 serves as a 3-bit I/O port / Serial I/O data transfer synchronous clock I/O pin
Port P2 serves as a 3-bit I/O port / Serial I/O data output pin
Port P2 serves as a 3-bit I/O port / Serial I/O data input pin
An N-channel open-drain I/O pin for a system reset
Connect CNVSS to VSS and apply “L” (0V) to CNVSS certainly
I/O pins of the main clock generating circuit
Ground
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
V
DD
VDCE
P3
0/INT0
P3
1/INT1
P32
P33
P60/AIN0
P61/AIN1
P62/AIN2
P63/AIN3
P40/AIN4
P41/AIN5
P42/AIN6
P43/AIN7
P00
P01
P02
P03
P10
P11
P12
–
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Power supply +5V
This pin is used to operate/stop the voltage drop detection circuit
Port P3 serves as a 4-bit I/O port / INT0 pin
and INT1 pin accept external interrupts
Port P3 serves as a 4-bit I/O port
Port P6 serves as a 4-bit I/O port / A/D
converter analog input pins
Port P4 serves as a 4-bit I/O port / A/D
converter analog input pins
Port P0 serves as a 4-bit I/O port
Port P1 serves as a 4-bit I/O port
M34519M6-521FP (X5646200) CPLD (Complex Programmable Logic Device)
PNL: IC2, 3
PNR: IC2, 3
PIN
NO.
I/O FUNCTIONNAME
PIN
NO.
I/O FUNCTIONNAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BGRES
RXVDD25
RX+
RX-
RXGND
TXGND
TX+
TX-
TXVDD25
SD7
SD6
SD5
SD4
SD3
GND
SD2
SD1
SD0
EEDIO
EECK
EECS
SD15
VDD
SD14
I/O
-
I/O
I/O
-
-
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
O
O
I/O
-
I/O
Bandgap pin
Power output +2.5 V
TP RX input
RX ground
TX ground
TP TX output
Power output +2.5 V
Processor data bus
Digital ground
Processor data bus
IO data to EEPROM
Clock to EEPROM
Chip select to EEPROM
Processor data bus
Digital power supply +3.3 V
Processor data bus
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SD13
SD12
SD11
SD10
SD9
VDD
SD8
CMD
GND
INT
IOR
IOW
CS
LED2
LED1
PWRST
TEST
VDD
X2
X1
GND
SD
RXGND
BGGND
I/O
I/O
I/O
I/O
I/O
-
I/O
I
-
O
I
I
I
O
O
I
I
-
O
I
-
I
-
-
Processor data bus
Digital power supply +3.3 V
Processor data bus
Command type
Digital ground
Interrupt request
Processor read command
Processor write command
Chip select
Link/Active LED
Speed LED
Power on reset
Operation mode
Digital power supply +3.3 V
Crystal 25 MHz out
Crystal 25 MHz in
Digital ground
Fiber-optic signal detect
RX ground
Bandgap ground
DM9000AEP (X7029A00) LAN CONTROLLER
DM: IC210
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTIONNAME
1
2
3
4
5
6
7
8
AINR
AINL
CKS1
VCOM
AGND
VA
VD
DGND
I
I
I
O
-
-
-
-
Rch Analog input pin
Lch Analog input pin
Mode select 1 pin
Common voltage output pin
Analog ground
Analog power supply
Digital power supply
Digital ground
9
10
11
12
13
14
15
16
SDTO
LRCK
MCLK
SCLK
PDN
DIF
CKS2
CKS0
O
I/O
I
I/O
I
I
I
I
Audio serial data output pin
Output channnel clock pin
Master clock input pin
Audio serial data clock pin
Power down mode pin
Audio interface format pin
Mode select 2 pin
Mode select 0 pin
DM: IC902
AK5381VT-E2 (X5219A0R) ADC (Analog to Digital Converter)