11. Switch the fault current on (110% of the set operating current) and wait for a
period longer than the set value tCoord.
No TRIP signal should appear.
12. Switch the fault current and the polarizing voltage off.
13. Reset the BLOCK digital input.
Permissive scheme
M13926-42 v8
1. Inject the polarizing voltage , which is 5% of UBase (EF4PTOC) where the
current is lagging the voltage by 65°.
2. Inject current (65° lagging the voltage) into one phase at about 110% of the
set operating current, and switch the current off with the switch.
3. Switch the fault current on, (110% of the set operating current) and wait
longer than the set value tCoord.
No TRIP signal should appear, and the CS binary output
should be activated.
4. Switch the fault current off.
5. Activate the CR binary input.
6. Switch the fault current on (110% of the set operating current) and measure
the operating time of the ECPSCH logic.
Use the TRIP signal from the configured binary output to stop the timer.
7. Compare the measured time with the setting for tCoord.
8. Activate the BLOCK digital input.
9. Switch the fault current on (110% of the set operating current) and wait for a
period longer than the set value tCoord.
No TRIP signal should appear.
10. Switch the fault current and the polarizing voltage off.
11. Reset the CR binary input and the BLOCK digital input.
9.9.4.2 Completing the test
M13926-71 v5
Continue to test another function or end the test by changing the TESTMODE
setting to Off. Restore connections and settings to their original values, if they were
changed for testing purposes.
Section 9 1MRK 506 383-UEN A
Testing functionality by secondary injection
154 Line distance protection REL650 2.2 IEC
Commissioning manual
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